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From: "Pandey, Radhey Shyam" <radheys@amd.com>
To: Golla Nagendra <nagendra.golla@amd.com>,
	Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Michal Simek <michal.simek@amd.com>,
	Michael Tretter <m.tretter@pengutronix.de>,
	Harini Katakam <harini.katakam@amd.com>,
	Shyam Pandey <radhey.shyam.pandey@amd.com>,
	Abin Joseph <abin.joseph@amd.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, git@amd.com
Subject: Re: [PATCH v5 3/4] dmaengine: zynqmp_dma: Add new compatible string for Versal Net
Date: Fri, 6 Nov 2026 16:40:31 +0530	[thread overview]
Message-ID: <9b3280d4-1fd9-4129-9ddf-2f58d404fd33@amd.com> (raw)
In-Reply-To: <20261106-adma_per_channel_reset_v5-v5-3-f9990669362f@amd.com>

On 11/6/2026 3:40 PM, Golla Nagendra wrote:
> Versal Net previously used the legacy xlnx,zynqmp-dma-1.0 compatible
> string. Add amd,versal-net-dma-1.0 to the of_device_id match table
> with SoC-specific match data via versal_net_dma_config.
> 
> Introduce a has_reset field in zynqmp_dma_config to indicate whether
> the compatible requires a per-channel reset during probe.
> 
> Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Thanks!

> ---
>   drivers/dma/xilinx/zynqmp_dma.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
> index 3b7dfa53f972..cb0eb13f9b05 100644
> --- a/drivers/dma/xilinx/zynqmp_dma.c
> +++ b/drivers/dma/xilinx/zynqmp_dma.c
> @@ -257,13 +257,20 @@ struct zynqmp_dma_device {
>   };
>   
>   struct zynqmp_dma_config {
> +	bool has_reset;
>   	u32 offset;
>   };
>   
>   static const struct zynqmp_dma_config versal2_dma_config = {
> +	.has_reset = true,
>   	.offset = IRQ_REG_OFFSET,
>   };
>   
> +/* offset = 0: Versal Net uses base IRQ register address */
> +static const struct zynqmp_dma_config versal_net_dma_config = {
> +	.has_reset = true,
> +};
> +
>   static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg,
>   				     u64 value)
>   {
> @@ -1193,6 +1200,7 @@ static void zynqmp_dma_remove(struct platform_device *pdev)
>   
>   static const struct of_device_id zynqmp_dma_of_match[] = {
>   	{ .compatible = "amd,versal2-dma-1.0", .data = &versal2_dma_config },
> +	{ .compatible = "amd,versal-net-dma-1.0", .data = &versal_net_dma_config },
>   	{ .compatible = "xlnx,zynqmp-dma-1.0", },
>   	{}
>   };
> 


  reply	other threads:[~2026-11-06 11:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-06 10:10 [PATCH v5 0/4] dmaengine: zynqmp_dma: Add reset support for Versal Gen2 and " Golla Nagendra
2026-11-06 10:10 ` [PATCH v5 1/4] dt-bindings: dma: xlnx,zynqmp-dma: Require resets for Versal Gen2 Golla Nagendra
2026-11-06 14:28   ` Rob Herring (Arm)
2026-11-06 10:10 ` [PATCH v5 2/4] dt-bindings: dma: xlnx,zynqmp-dma: Add Versal Net compatible Golla Nagendra
2026-11-06 14:27   ` Rob Herring (Arm)
2026-11-06 10:10 ` [PATCH v5 3/4] dmaengine: zynqmp_dma: Add new compatible string for Versal Net Golla Nagendra
2026-11-06 11:10   ` Pandey, Radhey Shyam [this message]
2026-11-06 10:10 ` [PATCH v5 4/4] dmaengine: zynqmp_dma: Add per-channel reset support Golla Nagendra
2026-11-06 11:11   ` Pandey, Radhey Shyam

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