From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Rik van Riel <riel@surriel.com>, Peter Zijlstra <peterz@infradead.org>
Cc: kernel test robot <oliver.sang@intel.com>,
oe-lkp@lists.linux.dev, lkp@intel.com,
linux-kernel@vger.kernel.org, x86@kernel.org,
Ingo Molnar <mingo@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Mel Gorman <mgorman@suse.de>
Subject: Re: [tip:x86/mm] [x86/mm/tlb] 209954cbc7: will-it-scale.per_thread_ops 13.2% regression
Date: Mon, 2 Dec 2024 11:30:07 -0500 [thread overview]
Message-ID: <9b3bd9b0-fd5b-4239-8ee4-ebabd0667b4b@efficios.com> (raw)
In-Reply-To: <8bf303a222ba27f3a86b357db58ee3df3fa7f82e.camel@surriel.com>
On 2024-11-28 21:52, Rik van Riel wrote:
> On Thu, 2024-11-28 at 14:46 -0500, Mathieu Desnoyers wrote:
>>
>> I suspect you could use a similar per-cpu data structure per-mm
>> to keep track of the pending TLB flush mask, and update it simply
>> with
>> load/store to per-CPU data rather than have to cacheline-bounce all
>> over
>> the place due to frequent mm_cpumask atomic updates.
>>
>> Then you get all the benefits without introducing a window where
>> useless
>> TLB flush IPIs get triggered.
>>
>> Of course it's slightly less compact in terms of memory footprint
>> than a
>> cpumask, but you gain a lot by removing cache line bouncing on this
>> frequent context switch code path.
>>
>> Thoughts ?
>
> The first thought that comes to mind is that we already
> have a per-CPU variable indicating which is the currently
> loaded mm on that CPU.
Only on x86 though.
>
> We could probably just skip sending IPIs to CPUs that do
> not have the mm_struct currently loaded.
>
> This can race against switch_mm_irqs_off() on a CPU
> switching to that mm simultaneously with the TLB flush,
> which should be fine because that CPU cannot load TLB
> entries from previously cleared page tables.
>
> However, it does mean we cannot safely clear bits
> out of the mm_cpumask, because a race between clearing
> the bit on one CPU, and setting it on another would not
> be something we could easily catch at all, unless we
> can figure out some clever memory ordering thing there.
>
Or we just build a per-cpu mm_cpumask from per-CPU state
every time we want to use the mm_cpumask. But AFAIU this
is going to be a tradeoff between:
- Overhead of context switch at scale
(e.g. will-it-scale:)
for a in $(seq 1 2); do (./context_switch1_threads -t 192 -s 20 &); done
For reference, my POC reaches 50% performance improvement with this.
vs
- Overhead of TLB flush
(e.g. will-it-scale:)
./tlb_flush2_threads -t 192 -s 20
For reference, my POC has about 33% regression on that test case due
to extra work when using mm_cpumask.
So I guess what we end up doing really depends which scenario we consider
most frequent.
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
next prev parent reply other threads:[~2024-12-02 16:30 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 14:57 kernel test robot
2024-11-28 16:21 ` Peter Zijlstra
2024-11-29 1:44 ` Oliver Sang
2024-11-28 19:46 ` Mathieu Desnoyers
2024-11-29 2:52 ` Rik van Riel
2024-12-02 16:30 ` Mathieu Desnoyers [this message]
2024-12-02 18:10 ` Rik van Riel
2024-12-02 16:50 ` Dave Hansen
2024-12-03 0:43 ` [PATCH] x86,mm: only trim the mm_cpumask once a second Rik van Riel
2024-12-04 13:15 ` Oliver Sang
2024-12-04 16:07 ` Rik van Riel
2024-12-04 16:56 ` [PATCH v3] " Rik van Riel
2024-12-04 20:19 ` Mathieu Desnoyers
2024-12-05 2:03 ` [PATCH v4] " Rik van Riel
2024-12-06 1:30 ` Oliver Sang
2024-12-06 9:40 ` [tip: x86/mm] x86/mm/tlb: Only " tip-bot2 for Rik van Riel
2024-12-03 1:22 ` [PATCH -tip] x86,mm: only " Rik van Riel
2024-12-03 14:57 ` Mathieu Desnoyers
2024-12-03 19:48 ` [PATCH v2] " Rik van Riel
2024-12-03 20:05 ` Dave Hansen
2024-12-03 20:07 ` Rik van Riel
2024-12-04 0:46 ` Dave Hansen
2024-12-04 1:43 ` Rik van Riel
2024-12-03 23:27 ` Mathieu Desnoyers
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9b3bd9b0-fd5b-4239-8ee4-ebabd0667b4b@efficios.com \
--to=mathieu.desnoyers@efficios.com \
--cc=dave.hansen@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=lkp@intel.com \
--cc=mgorman@suse.de \
--cc=mingo@kernel.org \
--cc=oe-lkp@lists.linux.dev \
--cc=oliver.sang@intel.com \
--cc=peterz@infradead.org \
--cc=riel@surriel.com \
--cc=torvalds@linux-foundation.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®