[PATCH] KVM: x86: Do not change ICR on write to APIC_SELF_IPI

[PATCH] KVM: x86: Do not change ICR on write to APIC_SELF_IPI

[Paolo Bonzini]

Emulating writes to SELF_IPI with a write to ICR has an unwanted side effect:
the value of ICR in vAPIC page gets changed.  The lists SELF_IPI as write-only,
with no associated MMIO offset, so any write should have no visible side
effect in the vAPIC page.

Reported-by: Chao Gao <chao.gao@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/kvm/lapic.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index ad8857359ad6..d5a33b6be7d5 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2120,10 +2120,9 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
 		break;
 
 	case APIC_SELF_IPI:
-		if (apic_x2apic_mode(apic)) {
-			kvm_lapic_reg_write(apic, APIC_ICR,
-					    APIC_DEST_SELF | (val & APIC_VECTOR_MASK));
-		} else
+		if (apic_x2apic_mode(apic))
+			kvm_apic_send_ipi(apic, APIC_DEST_SELF | (val & APIC_VECTOR_MASK), 0);
+		else
 			ret = 1;
 		break;
 	default:
-- 
2.31.1

Re: [PATCH] KVM: x86: Do not change ICR on write to APIC_SELF_IPI

[Sean Christopherson]

On Thu, Feb 24, 2022, Paolo Bonzini wrote:
> Emulating writes to SELF_IPI with a write to ICR has an unwanted side effect:
> the value of ICR in vAPIC page gets changed.  The lists SELF_IPI as write-only,
                                                   ^
						   |- SDM

> with no associated MMIO offset, so any write should have no visible side
> effect in the vAPIC page.
> 
> Reported-by: Chao Gao <chao.gao@intel.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---

Reviewed-by: Sean Christopherson <seanjc@google.com>

Re: [PATCH] KVM: x86: Do not change ICR on write to APIC_SELF_IPI

[Andrew Cooper]

> On Thu, Feb 24, 2022, Paolo Bonzini wrote:
>> Emulating writes to SELF_IPI with a write to ICR has an unwanted side
>> effect: the value of ICR in vAPIC page gets changed. The lists
>> SELF_IPI as write-only,                                                  ^
>> 					         |- SDM
>>
>> with no associated MMIO offset, so any write should have no visible
>> side effect in the vAPIC page. Reported-by: Chao Gao
>> <chao.gao@intel.com> Signed-off-by: Paolo Bonzini
>> <pbonzini@redhat.com> ---
>
> Reviewed-by: Sean Christopherson <seanjc@google.com>

This patch was just attempted to be ported to Xen.

Contrary to the claim, Intel Core (P-cores) really do overwrite ICR when
processing SELF_IPI.

~Andrew