* [PATCH] mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR
@ 2024-12-19 14:25 Bastien Curutchet
2024-12-19 14:55 ` Bastien Curutchet
0 siblings, 1 reply; 2+ messages in thread
From: Bastien Curutchet @ 2024-12-19 14:25 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, Thomas Petazzoni, Herve Codina,
Bastien Curutchet, Christopher Cordahi
For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is
polled only once every 100 us to check for the EMA_WAIT pin. This
isn't frequent enough and causes delays in NAND accesses.
Set the polling interval to 0s. It increases the page read speed
reported by flash_speed by ~40% (~30% on page writes).
---
Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
---
drivers/mtd/nand/raw/davinci_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 1f8354acfb50b2f4d155cdfc03afcf2863539f66..b3fe6f62bb3bd6a51da891c604d38142055ab1d3 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -724,7 +724,7 @@ static int davinci_nand_exec_instr(struct davinci_nand_info *info,
case NAND_OP_WAITRDY_INSTR:
timeout_us = instr->ctx.waitrdy.timeout_ms * 1000;
ret = readl_relaxed_poll_timeout(info->base + NANDFSR_OFFSET,
- status, status & BIT(0), 100,
+ status, status & BIT(0), 0,
timeout_us);
if (ret)
return ret;
---
base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37
change-id: 20241219-patch-nand-poll-b215766ea0a2
Best regards,
--
Bastien Curutchet <bastien.curutchet@bootlin.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR
2024-12-19 14:25 [PATCH] mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR Bastien Curutchet
@ 2024-12-19 14:55 ` Bastien Curutchet
0 siblings, 0 replies; 2+ messages in thread
From: Bastien Curutchet @ 2024-12-19 14:55 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, Thomas Petazzoni, Herve Codina,
Christopher Cordahi
Hi all,
On 12/19/24 3:25 PM, Bastien Curutchet wrote:
> For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is
> polled only once every 100 us to check for the EMA_WAIT pin. This
> isn't frequent enough and causes delays in NAND accesses.
>
> Set the polling interval to 0s. It increases the page read speed
> reported by flash_speed by ~40% (~30% on page writes).
>
> ---
> Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
I just realized that this SOB should be above the '---'. Sorry about
that, I'll send a V2 right away.
Best regards,
Bastien
^ permalink raw reply [flat|nested] 2+ messages in thread
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2024-12-19 14:25 [PATCH] mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR Bastien Curutchet
2024-12-19 14:55 ` Bastien Curutchet
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