From: Marek Vasut <marek.vasut@mailbox.org>
To: Rong Zhang <i@rong.moe>, Bjorn Helgaas <helgaas@kernel.org>
Cc: "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
linux-pci@vger.kernel.org, stable@vger.kernel.org,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Koichiro Den" <den@valinux.co.jp>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
"Ziyao Li" <liziyao@uniontech.com>,
"Huacai Chen" <chenhuacai@loongson.cn>,
"Richard Zhu" <hongxing.zhu@nxp.com>
Subject: Re: [PATCH v3] PCI: rcar-gen4: Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes
Date: Fri, 4 Sep 2026 23:53:03 +0200 [thread overview]
Message-ID: <9f0d8887-9332-4919-bee9-c165361e2ea3@mailbox.org> (raw)
In-Reply-To: <41f323cbed2da4fa3913dfd62b5595bc3d5228da.camel@rong.moe>
On 9/4/26 7:42 PM, Rong Zhang wrote:
Hello everyone,
>>> In light of the last paragraph above, that the MRRS has to be limited also
>>> on all devices downstream of this particular controller, I would like to ask
>>> -- does the Loongson controller have the same limitation or not ? If not,
>>> then I would argue this quirk should be isolated to this controller variant
>>> ; else, I am happy to start on the core patches.
>
> ACK. I agreed that it should make our life easier.
>
>>
>> I don't know if we'll get a real answer for Loongson (there's no
>> maintainer listed for it, hint hint :)),
>>
>
> (+CC Jiaxun)
>
> The driver was introduced by Jiaxun without updating MAINTAINERS. I guess
> he'd be willing to be listed as a maintainer.
>
> I don't work for Loongson, but I do maintain several MIPS-based Loongson
> devices for the Golang community with my colleagues and personally own a
> MIPS-based Loongson-LS3A4000-7A1000-NUC-SE mini PC. I do some PCIe
> experiments on it from time to time for fun. So I am OK if someone wants
> to list me as a maintainer or reviewer :)
>
>> but my guess is that it does
>> apply to all devices downstream of the Loongson controller.
>
> I believe this is the case. Maybe Jiaxun can shed a light on it too.
>
> Just checked the kmsg log from April, the firmware seemed to only clamp
> MRRS for devices directly connected to the root ports. IOW, it seemed to
> only clamp MRRS for the upstream port of a PCIe switch, so
> loongson_set_min_mrrs_quirk() had to fix up downstream ports.
>
> If you need more information I can do some more experiments with the PCIe
> switch card.
Please look at the commit message [1] , that lists the exact test and
the PCIe NVMe SSD which triggers the data corruption (let me know if
something is unclear). I think any PCIe NVMe SSD which is non-HMB with
MRRS on the SSD size that is > MRRS on the controller side will trigger
this issue too. If you could reproduce it on the Loongson, then yes, it
is affected. You might have to disable the current MRRS workaround in
the Loongson PCIe driver though as it might hide the issue.
Thank you for your help !
+CC NXP, because they have similar controller on MX95 (and others, but
the MX95 is closest to this I think)
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=37ca1997d2eeec86ad065008d6387fd15d18934c
next prev parent reply other threads:[~2026-09-06 7:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-21 2:05 Marek Vasut
2026-09-01 13:35 ` Manivannan Sadhasivam
2026-09-03 17:32 ` Bjorn Helgaas
2026-09-03 18:51 ` Marek Vasut
2026-09-03 20:27 ` Bjorn Helgaas
2026-09-03 20:43 ` Marek Vasut
2026-09-04 17:42 ` Rong Zhang
2026-09-04 21:53 ` Marek Vasut [this message]
2026-09-06 17:07 ` Rong Zhang
2026-09-09 2:34 ` Marek Vasut
2026-09-09 16:03 ` Rong Zhang
2026-09-17 19:19 ` Rong Zhang
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