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From: Marek Vasut <marek.vasut@mailbox.org>
To: Rong Zhang <i@rong.moe>, Bjorn Helgaas <helgaas@kernel.org>
Cc: "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	linux-pci@vger.kernel.org, stable@vger.kernel.org,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Koichiro Den" <den@valinux.co.jp>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	"Ziyao Li" <liziyao@uniontech.com>,
	"Huacai Chen" <chenhuacai@loongson.cn>,
	"Richard Zhu" <hongxing.zhu@nxp.com>
Subject: Re: [PATCH v3] PCI: rcar-gen4: Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes
Date: Wed, 9 Sep 2026 04:34:40 +0200	[thread overview]
Message-ID: <e563766f-359e-4133-9960-1b691bc0c774@mailbox.org> (raw)
In-Reply-To: <f66d7e55bb388c550e70fc425f1b911e40e0d578.camel@rong.moe>

On 9/6/26 7:07 PM, Rong Zhang wrote:

Hello Rong,

I apologize for my delayed reply.

>>> If you need more information I can do some more experiments with the PCIe
>>> switch card.
>>
>> Please look at the commit message [1] , that lists the exact test and
>> the PCIe NVMe SSD which triggers the data corruption (let me know if
>> something is unclear). I think any PCIe NVMe SSD which is non-HMB with
>> MRRS on the SSD size that is > MRRS on the controller side will trigger
>> this issue too.
>>
> 
> Unfortunately I don't have any non-HMB NVMe SSD, and it's unlikely I'll
> get one anytime soon due to the crazy price. Before the AI supply chain
> crisis, I bought several NVMe SSDs, but I chose HMB ones as they generate
> less heat and consume less electricity.

Maybe this could be reproduced even with another PCIe device with 
MRRS=512 or more, which posts MRd to the PCIe controller with MRRS=128 
or 256. The AHCI controller might be capable of that. I only have the 
SSD as a reproducer, but there could easily be more.

>> If you could reproduce it on the Loongson, then yes, it
>> is affected. You might have to disable the current MRRS workaround in
>> the Loongson PCIe driver though as it might hide the issue.
> 
> Due to the lack of non-HMB NVMe SSDs, I can't reproduce the exact same
> issue. Theoretically I may try to mess around with the AHCI controller
> (see the mentioned commit below) by manually overriding MRRS, as my
> device's firmware already clamps it. We will see...

Does the AHCI controller have MRRS higher than the PCIe controller ?

> The firmware of many Loongson devices (except for some MIPS-based ones,
> see the commit message of commit ef61a0405742 ("PCI: loongson: Limit MRRS
> to 256")) already clamps MRRS for most PCIe devices, which has proven
> that the 7A1000/7A2000 chipset does need the MRRS quirk.

This still only applies the MRRS limit to the PCIe controller, not to 
all devices on the bus, correct ?

I would like to find out whether all the devices (not only the 
controller) on the PCIe bus on Loongson must have MRRS limited or not.
-> If yes, then I should start preparing core patches
-> If no, then this quirk might specific to this controller

> Therefore, you
> can just go ahead with preparing the core patches without the need of
> waiting for my test result. It seems that your approach is not going to
> change the current fixup effects in a significant way, so it should be
> fine.

[...]

Thank you for your help !

-- 
Best regards,
Marek Vasut

  reply	other threads:[~2026-09-09  4:37 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-21  2:05 Marek Vasut
2026-09-01 13:35 ` Manivannan Sadhasivam
2026-09-03 17:32 ` Bjorn Helgaas
2026-09-03 18:51   ` Marek Vasut
2026-09-03 20:27     ` Bjorn Helgaas
2026-09-03 20:43       ` Marek Vasut
2026-09-04 17:42       ` Rong Zhang
2026-09-04 21:53         ` Marek Vasut
2026-09-06 17:07           ` Rong Zhang
2026-09-09  2:34             ` Marek Vasut [this message]
2026-09-09 16:03               ` Rong Zhang
2026-09-17 19:19                 ` Rong Zhang

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