From: "Sverdlin, Alexander" <alexander.sverdlin@siemens.com>
To: "christophe.leroy@csgroup.eu" <christophe.leroy@csgroup.eu>,
"broonie@kernel.org" <broonie@kernel.org>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
Cc: "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"florent.trinh-thai@cs-soprasteria.com"
<florent.trinh-thai@cs-soprasteria.com>
Subject: Re: [PATCH] spi: fsl-cpm: Check length parity before switching to 16 bit mode
Date: Mon, 10 Nov 2025 13:07:34 +0000 [thread overview]
Message-ID: <9ff09fa3b2d8efab15d220c88d8bef4cb1cc76b3.camel@siemens.com> (raw)
In-Reply-To: <07d1ea39a0e9b56846395d79d489a5153206ff5c.1762714267.git.christophe.leroy@csgroup.eu>
Hi Christophe,
just a couple of nitpicks below:
On Sun, 2025-11-09 at 19:55 +0100, Christophe Leroy wrote:
> Commit fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers
> with even size") failed to checkout that the size is really even before
^^^^^^^^
check/verify/"make sure"?
> switching to 16 bit mode. Until recently the problem went unnoticed
> because kernfs uses a pre-allocated bounce buffer of size PAGE_SIZE for
> reading eeprom.
^^^^^^
EEPROM?
> But commit 8ad6249c51d0 ("eeprom: at25: convert to spi-mem API")
> introduced an additional dynamically allocated bounce buffer whose size
> is exactly the size of the transfer, leading to a buffer overrun in
> the fsl-cpm driver when that size is odd.
>
> Add the missing length parity verification and remain in 8 bit mode
> when the length is not even.
>
> Fixes: fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers with even size")
Missing Cc: stable@?
> Closes: https://lore.kernel.org/all/638496dd-ec60-4e53-bad7-eb657f67d580@csgroup.eu/
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> drivers/spi/spi-fsl-spi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
> index 2f2082652a1a2..e845baa56cc66 100644
> --- a/drivers/spi/spi-fsl-spi.c
> +++ b/drivers/spi/spi-fsl-spi.c
> @@ -335,7 +335,7 @@ static int fsl_spi_prepare_message(struct spi_controller *ctlr,
> if (t->bits_per_word == 16 || t->bits_per_word == 32)
> t->bits_per_word = 8; /* pretend its 8 bits */
> if (t->bits_per_word == 8 && t->len >= 256 &&
> - (mpc8xxx_spi->flags & SPI_CPM1))
> + ((t->len & 1) == 0) && (mpc8xxx_spi->flags & SPI_CPM1))
could be written as "!(t->len & 1) && "...
> t->bits_per_word = 16;
> }
> }
You can add my RB tag into your v2.
--
Alexander Sverdlin
Siemens AG
www.siemens.com
next prev parent reply other threads:[~2025-11-10 13:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-09 18:55 Christophe Leroy
2025-11-10 13:07 ` Sverdlin, Alexander [this message]
2025-11-20 8:41 ` Christophe Leroy
2025-12-15 13:59 ` Mark Brown
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