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* Re: [PATCH] perf vendor events: Update datasource event name to fix duplicate events
       [not found] ` <CAP-5=fWtLHCyZh_6hBkCg16ekOXfwSGAVT9xvgKcUsMcu=Ou9w@mail.gmail.com>
@ 2023-12-05  7:14   ` Athira Rajeev
       [not found]   ` <ZW40nstmGUeV9Fie@kernel.org>
  1 sibling, 0 replies; 2+ messages in thread
From: Athira Rajeev @ 2023-12-05  7:14 UTC (permalink / raw)
  To: Ian Rogers, Arnaldo Carvalho de Melo, Namhyung Kim
  Cc: Jiri Olsa, Adrian Hunter, James Clark, linux-perf-users,
	linuxppc-dev, Madhavan Srinivasan, Kajol Jain, Disha Goel, LKML



> On 05-Dec-2023, at 1:42 AM, Ian Rogers <irogers@google.com> wrote:
> 
> On Thu, Nov 23, 2023 at 8:01 AM Athira Rajeev
> <atrajeev@linux.vnet.ibm.com> wrote:
>> 
>> Running "perf list" on powerpc fails with segfault
>> as below:
>> 
>>   ./perf list
>>   Segmentation fault (core dumped)
>> 
>> This happens because of duplicate events in the json list.
>> The powerpc Json event list contains some event with same
>> event name, but different event code. They are:
>> - PM_INST_FROM_L3MISS (Present in datasource and frontend)
>> - PM_MRK_DATA_FROM_L2MISS (Present in datasource and marked)
>> - PM_MRK_INST_FROM_L3MISS (Present in datasource and marked)
>> - PM_MRK_DATA_FROM_L3MISS (Present in datasource and marked)
>> 
>> pmu_events_table__num_events uses the value from
>> table_pmu->num_entries which includes duplicate events as
>> well. This causes issue during "perf list" and results in
>> segmentation fault.
>> 
>> Since both event codes are valid, append _DSRC to the Data
>> Source events (datasource.json), so that they would have a
>> unique name. Also add PM_DATA_FROM_L2MISS_DSRC and
>> PM_DATA_FROM_L3MISS_DSRC events. With the fix, perf list
>> works as expected.
>> 
>> Fixes: fc1435807533 ("perf vendor events power10: Update JSON/events")
>> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
> 
> Given duplicate events creates broken pmu-events.c we should capture
> that as an exception in jevents.py. That way a JEVENTS_ARCH=all build
> will fail if any vendor/architecture would break in this way. We
> should also add JEVENTS_ARCH=all to tools/perf/tests/make. Athira, do
> you want to look at doing this?
> 
> Thanks,
> Ian

Hi Ian,

That’s a great suggestion. This will definitely help to capture the issues ahead.
I am interested and will work on adding this as part of tools/perf/tests/make

Thanks
Athira
> 
>> ---
>> .../arch/powerpc/power10/datasource.json       | 18 ++++++++++++++----
>> 1 file changed, 14 insertions(+), 4 deletions(-)
>> 
>> diff --git a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
>> index 6b0356f2d301..0eeaaf1a95b8 100644
>> --- a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
>> +++ b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
>> @@ -99,6 +99,11 @@
>>     "EventName": "PM_INST_FROM_L2MISS",
>>     "BriefDescription": "The processor's instruction cache was reloaded from a source beyond the local core's L2 due to a demand miss."
>>   },
>> +  {
>> +    "EventCode": "0x0003C0000000C040",
>> +    "EventName": "PM_DATA_FROM_L2MISS_DSRC",
>> +    "BriefDescription": "The processor's L1 data cache was reloaded from a source beyond the local core's L2 due to a demand miss."
>> +  },
>>   {
>>     "EventCode": "0x000380000010C040",
>>     "EventName": "PM_INST_FROM_L2MISS_ALL",
>> @@ -161,9 +166,14 @@
>>   },
>>   {
>>     "EventCode": "0x000780000000C040",
>> -    "EventName": "PM_INST_FROM_L3MISS",
>> +    "EventName": "PM_INST_FROM_L3MISS_DSRC",
>>     "BriefDescription": "The processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss."
>>   },
>> +  {
>> +    "EventCode": "0x0007C0000000C040",
>> +    "EventName": "PM_DATA_FROM_L3MISS_DSRC",
>> +    "BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 due to a demand miss."
>> +  },
>>   {
>>     "EventCode": "0x000780000010C040",
>>     "EventName": "PM_INST_FROM_L3MISS_ALL",
>> @@ -981,7 +991,7 @@
>>   },
>>   {
>>     "EventCode": "0x0003C0000000C142",
>> -    "EventName": "PM_MRK_DATA_FROM_L2MISS",
>> +    "EventName": "PM_MRK_DATA_FROM_L2MISS_DSRC",
>>     "BriefDescription": "The processor's L1 data cache was reloaded from a source beyond the local core's L2 due to a demand miss for a marked instruction."
>>   },
>>   {
>> @@ -1046,12 +1056,12 @@
>>   },
>>   {
>>     "EventCode": "0x000780000000C142",
>> -    "EventName": "PM_MRK_INST_FROM_L3MISS",
>> +    "EventName": "PM_MRK_INST_FROM_L3MISS_DSRC",
>>     "BriefDescription": "The processor's instruction cache was reloaded from beyond the local core's L3 due to a demand miss for a marked instruction."
>>   },
>>   {
>>     "EventCode": "0x0007C0000000C142",
>> -    "EventName": "PM_MRK_DATA_FROM_L3MISS",
>> +    "EventName": "PM_MRK_DATA_FROM_L3MISS_DSRC",
>>     "BriefDescription": "The processor's L1 data cache was reloaded from beyond the local core's L3 due to a demand miss for a marked instruction."
>>   },
>>   {
>> --
>> 2.39.3



^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] perf vendor events: Update datasource event name to fix duplicate events
       [not found]       ` <CAP-5=fXWm_ZZjQ-36eTJTuWQsQwwCEXer22Oid7X-PSe8=WY1Q@mail.gmail.com>
@ 2023-12-05  7:16         ` Athira Rajeev
  0 siblings, 0 replies; 2+ messages in thread
From: Athira Rajeev @ 2023-12-05  7:16 UTC (permalink / raw)
  To: Ian Rogers, Arnaldo Carvalho de Melo, Namhyung Kim
  Cc: Kajol Jain, Adrian Hunter, linux-perf-users, Madhavan Srinivasan,
	James Clark, Jiri Olsa, Disha Goel, linuxppc-dev, LKML



> On 05-Dec-2023, at 2:43 AM, Ian Rogers <irogers@google.com> wrote:
> 
> On Mon, Dec 4, 2023 at 12:22 PM Arnaldo Carvalho de Melo
> <acme@kernel.org> wrote:
>> 
>> Em Mon, Dec 04, 2023 at 05:20:46PM -0300, Arnaldo Carvalho de Melo escreveu:
>>> Em Mon, Dec 04, 2023 at 12:12:54PM -0800, Ian Rogers escreveu:
>>>> On Thu, Nov 23, 2023 at 8:01 AM Athira Rajeev
>>>> <atrajeev@linux.vnet.ibm.com> wrote:
>>>>> 
>>>>> Running "perf list" on powerpc fails with segfault
>>>>> as below:
>>>>> 
>>>>>   ./perf list
>>>>>   Segmentation fault (core dumped)
>>>>> 
>>>>> This happens because of duplicate events in the json list.
>>>>> The powerpc Json event list contains some event with same
>>>>> event name, but different event code. They are:
>>>>> - PM_INST_FROM_L3MISS (Present in datasource and frontend)
>>>>> - PM_MRK_DATA_FROM_L2MISS (Present in datasource and marked)
>>>>> - PM_MRK_INST_FROM_L3MISS (Present in datasource and marked)
>>>>> - PM_MRK_DATA_FROM_L3MISS (Present in datasource and marked)
>>>>> 
>>>>> pmu_events_table__num_events uses the value from
>>>>> table_pmu->num_entries which includes duplicate events as
>>>>> well. This causes issue during "perf list" and results in
>>>>> segmentation fault.
>>>>> 
>>>>> Since both event codes are valid, append _DSRC to the Data
>>>>> Source events (datasource.json), so that they would have a
>>>>> unique name. Also add PM_DATA_FROM_L2MISS_DSRC and
>>>>> PM_DATA_FROM_L3MISS_DSRC events. With the fix, perf list
>>>>> works as expected.
>>>>> 
>>>>> Fixes: fc1435807533 ("perf vendor events power10: Update JSON/events")
>>>>> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
>>>> 
>>>> Given duplicate events creates broken pmu-events.c we should capture
>>>> that as an exception in jevents.py. That way a JEVENTS_ARCH=all build
>>>> will fail if any vendor/architecture would break in this way. We
>>>> should also add JEVENTS_ARCH=all to tools/perf/tests/make. Athira, do
>>>> you want to look at doing this?
>>> 
>>> Should I go ahead and remove this patch till this is sorted out?
>> 
>> I'll keep it, its already in tmp.perf-tools-next, we can go from there
>> and improve this with follow up patches,

Thanks Arnaldo for pulling the fix patch.

> 
> Agreed. I could look to do the follow up but likely won't have a
> chance for a while. If others could help out it would be great. I'd
> like to have the jevents and json be robust enough that we don't trip
> over problems like this and the somewhat similar AmpereOne issue.

Yes Ian.

I will look at adding this with follow up patches and including this as part of tools/perf/tests/make

Thanks
Athira
> 
> Thanks,
> Ian
> 
>> - Arnaldo



^ permalink raw reply	[flat|nested] 2+ messages in thread

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