[PATCH v1] drm/panel: panel-edp: Adjust T8 timing for AUO B116XAK01.6 and B140XTK02.4

[PATCH v1] drm/panel: panel-edp: Adjust T8 timing for AUO B116XAK01.6 and B140XTK02.4

[dioyc_zhang]

Screen garbage or flickering can be observed during mode changes (such
as VT switches) on systems using the AUO B116XAK01.6 and B140XTK02.4 panels.
This occurs because the backlight is enabled before the video signal
stabilizes. Waveform measurements show that the panel signal takes around
140ms to stabilize after a mode change, meaning the previous 50ms T8
timing was insufficient.

To resolve this issue, adjust the eDP panel delay entry from
delay_200_500_e50 to delay_200_500_e200 (increasing T8 from 50ms to 200ms).
This matches the updated panel specifications from AUO, which now formally
define T8 as 200ms to mask any display abnormalities during mode changes.

Signed-off-by: dioyc_zhang <dioyc_zhang@compal.corp-partner.google.com>
---
 drivers/gpu/drm/panel/panel-edp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index 8d3859cd3ddc..3a168bfffd4e 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -2055,7 +2055,7 @@ static const struct edp_panel_entry edp_panels[] = {
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),
-	EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),
+	EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e200, "B116XAK01.6"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"),
@@ -2074,7 +2074,7 @@ static const struct edp_panel_entry edp_panels[] = {
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"),
-	EDP_PANEL_ENTRY('A', 'U', 'O', 0x67a8, &delay_200_500_e50, "B140XTK02.4"),
+	EDP_PANEL_ENTRY('A', 'U', 'O', 0x67a8, &delay_200_500_e200, "B140XTK02.4"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"),
 	EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
-- 
2.34.1

Re: [PATCH v1] drm/panel: panel-edp: Adjust T8 timing for AUO B116XAK01.6 and B140XTK02.4

[Doug Anderson]

Hi,

On Thu, Jul 16, 2026 at 8:00 PM dioyc_zhang
<dioyc_zhang@compal.corp-partner.google.com> wrote:
>
> Screen garbage or flickering can be observed during mode changes (such
> as VT switches) on systems using the AUO B116XAK01.6 and B140XTK02.4 panels.
> This occurs because the backlight is enabled before the video signal
> stabilizes. Waveform measurements show that the panel signal takes around
> 140ms to stabilize after a mode change, meaning the previous 50ms T8
> timing was insufficient.
>
> To resolve this issue, adjust the eDP panel delay entry from
> delay_200_500_e50 to delay_200_500_e200 (increasing T8 from 50ms to 200ms).
> This matches the updated panel specifications from AUO, which now formally
> define T8 as 200ms to mask any display abnormalities during mode changes.

Great description / justification. Increasing delays always stinks,
but sometimes is unavoidable.


> Signed-off-by: dioyc_zhang <dioyc_zhang@compal.corp-partner.google.com>

Any chance you could improve the "Name" part of your Signed-off-by
(and patch authorship, too)? Is "dioyc_zhang" really a name that you
usually use to identify yourself? It seems like it was just git
automatically assigning something since you typed in an email address
but not a name...

-Doug