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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Alistair Popple" <apopple@nvidia.com>
Cc: dri-devel@lists.freedesktop.org, dakr@kernel.org,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>,
	linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org,
	Nouveau <nouveau-bounces@lists.freedesktop.org>
Subject: Re: [PATCH 05/10] gpu: nova-core: gsp: Add GSP command queue handling
Date: Thu, 04 Sep 2025 20:26:34 +0900	[thread overview]
Message-ID: <DCJZ9RJMI55S.38IB570PFGM7V@nvidia.com> (raw)
In-Reply-To: <6vewssmsixzbghivrehmng7pyapmidh6nx5qjd2bzfr2orgeob@p2cni6gj75l3>

On Thu Sep 4, 2025 at 3:57 PM JST, Alistair Popple wrote:
<snip>
>> > +}
>> > +
>> > +// This next section contains constants and structures hand-coded from the GSP
>> > +// headers We could replace these with bindgen versions, but that's a bit of a
>> > +// pain because they basically end up pulling in the world (ie. definitions for
>> > +// every rpc method). So for now the hand-coded ones are fine. They are just
>> > +// structs so we can easily move to bindgen generated ones if/when we want to.
>> > +
>> > +// A GSP RPC header
>> > +#[repr(C)]
>> > +#[derive(Debug, Clone)]
>> > +struct GspRpcHeader {
>> > +    header_version: u32,
>> > +    signature: u32,
>> > +    length: u32,
>> > +    function: u32,
>> > +    rpc_result: u32,
>> > +    rpc_result_private: u32,
>> > +    sequence: u32,
>> > +    cpu_rm_gfid: u32,
>> > +}
>> 
>> This is the equivalent of `rpc_message_header_v03_00` in OpenRM. The
>> fact it is versioned makes me a bit nervous. :) If the layout change
>> somehow, we are in for a fun night of debugging. This is where having an
>> opaque abstraction built on top of a bindgen-generated type would be
>> handy: if the layout changes in an incompatible way, when the
>> abstraction would break at compile-time.
>
> Argh! I guess I wrote that before we were generating the headers and I never
> thought to go back and change that. Will fix these to use the generated binding.
>
> I will sync up with you offline but I'm not really understanding the point here.
> If a bindgen generated type changes in some incompatible way wouldn't we already
> get a compile-time error? And if the bindgen generated type changes, what's to
> say the rest of the logic hasn't also changed?
>
> Whilst I'm not totally opposed to something like this it just seems premature
> - the ABI is supposed to be stabalising and in practice none of the structures
> we care about appear to have changed in the 3 years since 525.53 was released.
> So IHMO it would be better to just deal with these changes if (not when) they
> happen rather than try and create an abstraction now, especially as this is only
> supposed to become more stable.

While I also hope we will achieve some level of ABI stability, I want to
provision a bit just in case this goal turns out to be too idealistic.

At the moment we are touching bindings internals a bit everywhere in the
`gsp` module. As the driver matures, that trend can only continue - if
one day we realize that we need a firmware version abstraction after
all, it will get increasingly difficult (and time-consuming) to shoehorn
back as time goes. It is much easier to do this from the start.

Also, having a proper abstraction objectively results in better code. I
will share the bits I have written with you for testing purposes, but I
think you will agree that this makes the GSP module much cleaner,
focused on the higher-level operations, while the lower-level code is
divided into easy-to-understand methods, right next to the type they
manipulate instead of being inlined as part of the sub-logic of another
function. Even without the prospect of multiple firmware versions, it is
worth doing.

<snip>
>> Doing so is valuable for clarity as well as future compatibility, as it
>> clearly shows in a single page of code how the header is used. Here is
>> all the code operating on it, in a single block instead of being spread
>> through this file:
>> 
>> 	impl MsgqTxHeader {
>> 			pub(crate) fn new(msgq_size: u32, msg_count: u32, rx_hdr_offset: u32) -> Self {
>> 					Self(bindings::msgqTxHeader {
>> 							version: 0,
>> 							size: msgq_size,
>> 							msgSize: GSP_PAGE_SIZE as u32,
>> 							msgCount: msg_count as u32,
>> 							writePtr: 0,
>> 							flags: 1,
>> 							rxHdrOff: rx_hdr_offset,
>> 							entryOff: GSP_PAGE_SIZE as u32,
>> 					})
>> 			}
>> 
>> 			pub(crate) fn write_ptr(&self) -> u32 {
>> 					let ptr = (&self.0.writePtr) as *const u32;
>> 
>> 					unsafe { ptr.read_volatile() }
>> 			}
>> 
>> 			pub(crate) fn set_write_ptr(&mut self, val: u32) {
>> 					let ptr = (&mut self.0.writePtr) as *mut u32;
>> 
>> 					unsafe { ptr.write_volatile(val) }
>> 			}
>> 	}
>
> Yes, this makes a lot of sense although I'm still not seeing the value of the
> [repr(transparent)] representation. Hopefully you can explain during out sync
> up ;)

This type is shared with the GSP, so we must ensure that its layout is
exactly the same as the C structure it wraps.


  reply	other threads:[~2025-09-04 11:26 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-27  8:19 [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Alistair Popple
2025-08-27  8:19 ` [PATCH 01/10] gpu: nova-core: Set correct DMA mask Alistair Popple
2025-08-29 23:55   ` John Hubbard
2025-09-01 23:55     ` Alistair Popple
2025-09-03 19:45       ` John Hubbard
2025-09-03 22:03         ` Alistair Popple
2025-08-27  8:19 ` [PATCH 02/10] gpu: nova-core: Create initial GspSharedMemObjects Alistair Popple
2025-08-27  8:20 ` [PATCH 03/10] gpu: nova-core: gsp: Create wpr metadata Alistair Popple
2025-09-01  7:46   ` Alexandre Courbot
2025-09-03  8:57     ` Alistair Popple
2025-09-03 12:51       ` Alexandre Courbot
2025-09-03 13:10         ` Alexandre Courbot
2025-08-27  8:20 ` [PATCH 04/10] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure Alistair Popple
2025-09-07 10:54   ` Alice Ryhl
2025-09-08 11:31     ` Alistair Popple
2025-09-08 11:42       ` Alexandre Courbot
2025-09-09  1:11         ` Alistair Popple
2025-08-27  8:20 ` [PATCH 05/10] gpu: nova-core: gsp: Add GSP command queue handling Alistair Popple
2025-08-27 20:35   ` John Hubbard
2025-08-27 23:42     ` Alistair Popple
2025-09-04  4:12   ` Alexandre Courbot
2025-09-04  6:57     ` Alistair Popple
2025-09-04 11:26       ` Alexandre Courbot [this message]
2025-09-05 11:50   ` Alexandre Courbot
2025-09-08  5:44     ` Alexandre Courbot
2025-08-27  8:20 ` [PATCH 06/10] gpu: nova-core: gsp: Create rmargs Alistair Popple
2025-08-27  8:20 ` [PATCH 07/10] gpu: nova-core: gsp: Create RM registry and sysinfo commands Alistair Popple
2025-08-29  6:02   ` Alistair Popple
2025-08-27  8:20 ` [PATCH 08/10] gpu: nova-core: falcon: Add support to check if RISC-V is active Alistair Popple
2025-08-29 18:48   ` Timur Tabi
2025-09-02  0:08     ` Alistair Popple
2025-09-19 23:05   ` Timur Tabi
2025-08-27  8:20 ` [PATCH 09/10] gpu: nova-core: falcon: Add support to write firmware version Alistair Popple
2025-08-27  8:20 ` [PATCH 10/10] gpu: nova-core: gsp: Boot GSP Alistair Popple
2025-08-28  8:37 ` [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Miguel Ojeda
2025-08-29  3:03   ` Alexandre Courbot
2025-08-29  7:40     ` Danilo Krummrich
2025-08-29 10:01       ` Miguel Ojeda
2025-08-29 13:47         ` Alexandre Courbot

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