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From: "Gary Guo" <gary@garyguo.net>
To: "John Hubbard" <jhubbard@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alexandre Courbot" <acourbot@nvidia.com>
Cc: "Timur Tabi" <ttabi@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	"Eliot Courtney" <ecourtney@nvidia.com>,
	"Shashank Sharma" <shashanks@nvidia.com>,
	"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	nova-gpu@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] gpu: nova-core: clarify FSP ordering in the chipset table
Date: Fri, 12 Jun 2026 13:06:51 +0100	[thread overview]
Message-ID: <DJ723OXGM3QC.2YNSLXNPCLKC9@garyguo.net> (raw)
In-Reply-To: <20260612040420.121499-1-jhubbard@nvidia.com>

On Fri Jun 12, 2026 at 5:04 AM BST, John Hubbard wrote:
> The Chipset enum lists GPUs in chip-ID order, but FSP capability does
> not follow that order. Hopper and Blackwell boot the GSP via FSP, while
> Ada, whose chip IDs fall numerically between Hopper and Blackwell, uses
> the older SEC2 booter path instead. Add a comment so the table ordering
> does not suggest that everything past Hopper uses FSP.
>
> Suggested-by: Timur Tabi <ttabi@nvidia.com>
> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
> ---
>
> Changes since v1 [1]:
>
> * Keep the existing "Hopper and later" wording in uses_fsp() rather than
>   changing it, and put the clarification entirely in the chipset table
>   comment (Timur Tabi).
>
> * Reword that comment to describe the Hopper/Ada chip-ID inversion and to
>   say "Hopper and later" excludes Ada and means Hopper, Blackwell, Rubin,
>   and everything after that, so it stays correct once Rubin is added
>   (Timur Tabi).
>
> [1] https://lore.kernel.org/all/20260610234128.547952-1-jhubbard@nvidia.com/
>
>
>  drivers/gpu/nova-core/gpu.rs | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
> index b3c91731db45..20b59bb6b7d9 100644
> --- a/drivers/gpu/nova-core/gpu.rs
> +++ b/drivers/gpu/nova-core/gpu.rs
> @@ -91,6 +91,10 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
>      GA104 = 0x174,
>      GA106 = 0x176,
>      GA107 = 0x177,
> +    // Chip IDs are in numerical order, which does not match FSP capability. Hopper (GH100) has a
> +    // lower chip ID than Ada (AD10x), yet Hopper boots the GSP via FSP while Ada uses the older
> +    // SEC2 booter. We therefore consider Hopper to be after Ada, so "Hopper and later" excludes
> +    // Ada and means Hopper, Blackwell, Rubin, and everything after that.

This would be inconsistent with the derived `PartialOrd` implementation?

If we consider Hopper to be after Ada, then we should be able to `assert!(GH100 > AD102);`

Best,
Gary

>      // Hopper
>      GH100 = 0x180,
>      // Ada
>
> base-commit: 550dc7536644db2d67c6f8cf525bba682fba08d9



  reply	other threads:[~2026-06-12 12:06 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-12  4:04 John Hubbard
2026-06-12 12:06 ` Gary Guo [this message]
2026-06-12 15:43   ` Timur Tabi
2026-06-12 16:07     ` Gary Guo
2026-06-12 16:24       ` Timur Tabi
2026-06-12 17:17         ` John Hubbard
2026-06-12 17:50           ` Timur Tabi

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