Re: [PATCH v3 05/14] gpu: nova-core: add the per-architecture GIN CPU interrupt HAL

["Alexandre Courbot" <acourbot@nvidia.com>]

On Thu Sep 3, 2026 at 12:15 PM JST, John Hubbard wrote:
> GIN, the GPU Interrupt and Notification unit, is the GPU's interrupt
> controller. Each PCIe function has its own tree, whose leaf count
> depends on the GPU family.
>
> Message-signaled delivery stops after each edge until the CPU rearms it,
> and the rearm write differs by family and interrupt type:
>
> * Pre-Hopper MSI writes an EOI through the BAR0 PCI configuration space
>   mirror.
>
> * MSI for Hopper and later cycles the TOP enable bits of every serviced
>   subtree.
>
> * MSI-X on any family cycles the bits of the handler's own subtree.
>
> Provide the leaf count and the rearm method through a per-architecture
> interrupt HAL, and name the interrupt type with nova-core's own two
> variants rather than the PCI core's three, which include the
> level-triggered INTx that nova-core never allocates.
>
> Assisted-by: Cursor:claude-opus-5
> Reviewed-by: Will Pierce <wpierce@nvidia.com>
> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
> ---
>  drivers/gpu/nova-core/irq.rs           |  14 ++++
>  drivers/gpu/nova-core/irq/hal.rs       | 106 +++++++++++++++++++++++++
>  drivers/gpu/nova-core/irq/hal/gh100.rs |  29 +++++++
>  drivers/gpu/nova-core/irq/hal/tu102.rs |  28 +++++++
>  4 files changed, 177 insertions(+)
>  create mode 100644 drivers/gpu/nova-core/irq/hal.rs
>  create mode 100644 drivers/gpu/nova-core/irq/hal/gh100.rs
>  create mode 100644 drivers/gpu/nova-core/irq/hal/tu102.rs
>
> diff --git a/drivers/gpu/nova-core/irq.rs b/drivers/gpu/nova-core/irq.rs
> index 3066ceeb850c..d21dee1b89a0 100644
> --- a/drivers/gpu/nova-core/irq.rs
> +++ b/drivers/gpu/nova-core/irq.rs
> @@ -8,5 +8,19 @@
>  //!
>  //! See `Documentation/gpu/nova/core/interrupts.rst`.
>  
> +mod hal;
>  mod interrupt_tree;
>  mod regs;
> +
> +/// The message-signaled interrupt type a vector allocation obtained.
> +///
> +/// nova-core allocates MSI-X or MSI and nothing else, so the level-triggered INTx that
> +/// [`kernel::pci::IrqType`] also names has no representation here.
> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +pub(crate) enum MsiType {

This type is module-local and can stay private (same for the `msi_type`
method).