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From: "Hawkins, Nick" <nick.hawkins@hpe.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: "Verdun, Jean-Marie" <verdun@hpe.com>,
	"krzysztof.kozlowski+dt@linaro.org" 
	<krzysztof.kozlowski+dt@linaro.org>,
	"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v1 2/5] dt-bindings: soc: hpe: Add hpe,gxp-plreg
Date: Wed, 12 Oct 2022 19:56:26 +0000	[thread overview]
Message-ID: <DM4PR84MB192795B45639710259E9B19D88229@DM4PR84MB1927.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <CAL_Jsq+xb2Ltfne4mQMXQAde-eHS7TsO73YZ-vhE7nK1Z_M0gw@mail.gmail.com>

> > +examples:
> > +  - |
> > +    cpld@1e789000 {
> > +      compatible = "hpe,gxp-plreg", "simple-mfd", "syscon";
> > +      reg = <0x1e789000 0x1000>;
> > +      fan1 {
> > +        bit = <0x01>;
> > +        inst = <0x27>;
> > +        id = <0x2B>;

> These property names are way too generic for device specific properties. There is zero description of what the h/w does and any of these child nodes to give any advice on direction. However, a node per register or register field is generally the wrong direction.

Thank you for your valued feedback. The goal I was trying to achieve here was making our programmable logic register driver interface in a generic way across multiple platforms based on inputs we provide with the .dts file for each platform. For instance if we want to read the fan 1 install status on platform X it would be reading bit 0x01 of byte 0x27 where as on platform Y it could be bit 0x02 of byte 0x16. Is there a format you would recommend that I can adhere too?

Thanks!

-Nick Hawkins

  reply	other threads:[~2022-10-12 19:57 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-11 18:55 [PATCH v1 0/5] Add PLREG and SPI Driver GXP Support nick.hawkins
2022-10-11 18:55 ` [PATCH v1 1/5] soc: hpe: add support for HPE GXP Programmable Register Driver nick.hawkins
2022-10-11 20:05   ` Krzysztof Kozlowski
2022-10-12 20:25     ` Hawkins, Nick
2022-10-13 12:27       ` Krzysztof Kozlowski
2022-10-12  0:28   ` kernel test robot
2022-10-11 18:55 ` [PATCH v1 2/5] dt-bindings: soc: hpe: Add hpe,gxp-plreg nick.hawkins
2022-10-11 19:51   ` Krzysztof Kozlowski
2022-10-11 20:27   ` Rob Herring
2022-10-12 19:56     ` Hawkins, Nick [this message]
2022-10-22 15:52       ` Krzysztof Kozlowski
2022-10-25  0:03         ` Hawkins, Nick
2022-10-25  0:15           ` Krzysztof Kozlowski
2022-10-25 18:44             ` Hawkins, Nick
2022-10-25 18:55               ` Krzysztof Kozlowski
2022-10-25 19:26                 ` Hawkins, Nick
2022-10-25 19:33                   ` Krzysztof Kozlowski
     [not found]                     ` <DM4PR84MB197662C12018090C312AF72DD6319@DM4PR84MB1976.NAMPRD84.PROD.OUTLOOK.COM>
2022-10-25 19:48                       ` Krzysztof Kozlowski
2022-10-25 19:49                       ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 3/5] ARM: dts: hpe: Add PLREG/SPI Support nick.hawkins
2022-10-11 19:53   ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 4/5] ARM: multi_v7_defconfig: Enable GXP SPI and PLREG Drivers nick.hawkins
2022-10-11 19:54   ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 5/5] MAINTAINERS: Add HPE SOC Drivers nick.hawkins
2022-10-11 20:06   ` Krzysztof Kozlowski

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