From: "Andrejczuk, Grzegorz" <grzegorz.andrejczuk@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: "mingo@redhat.com" <mingo@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"x86@kernel.org" <x86@kernel.org>, "bp@suse.de" <bp@suse.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"Daniluk, Lukasz" <lukasz.daniluk@intel.com>,
"Cownie, James H" <james.h.cownie@intel.com>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
"Luc, Piotr" <Piotr.Luc@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v9 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing
Date: Wed, 9 Nov 2016 21:48:35 +0000 [thread overview]
Message-ID: <ED52C51D9B87F54892CE544909A13C6C1FF6ACF5@IRSMSX101.ger.corp.intel.com> (raw)
In-Reply-To: <alpine.DEB.2.20.1611091518210.3501@nanos>
-----Original Message-----
From: Thomas Gleixner [mailto:tglx@linutronix.de]
Sent: Wednesday, November 9, 2016 3:32 PM
To: Andrejczuk, Grzegorz <grzegorz.andrejczuk@intel.com>
Cc: mingo@redhat.com; hpa@zytor.com; x86@kernel.org; bp@suse.de; dave.hansen@linux.intel.com; Daniluk, Lukasz <lukasz.daniluk@intel.com>; Cownie, James H <james.h.cownie@intel.com>; Pan, Jacob jun <jacob.jun.pan@intel.com>; Luc, Piotr <Piotr.Luc@intel.com>; linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing
On Wed, 9 Nov 2016, Grzegorz Andrejczuk wrote:
> These patches enable Intel Xeon Phi x200 feature to use MONITOR/MWAIT
> instruction in ring 3 (userspace) Patches set MSR 0x140 for all logical CPUs.
> Then expose it as CPU feature and introduces elf HWCAP capability for x86.
> Reference:
> https://software.intel.com/en-us/blogs/2016/10/06/intel-xeon-phi-produ
> ct-family-x200-knl-user-mode-ring-3-monitor-and-mwait
>
> v9:
> Removed PHI from defines
>
> Do I really have to spell out everything? I asked you several times to get rid of all PHI associations except for the feature detection logic.
>
> But no, you still insist on it being a PHI special feature and once it becomes available on other models, which can be expected, we can deal with the cleanup and a PHI specific kernel parameter which we have to support forever.
>
> I'm slowly starting to get really grumpy. Your attitude of just addressing review comments in the most minimal way w/o thinking about the big picture is annoying.
>
> This is hillarious. 9 versions of that simple thing, just because you insist on slapping PHI to everything despite being told otherwise.
>
> I do not care about the time you waste with this, but I very much care about the time you steal from me.
>
> If you can't be bothered to send something which addresses _ALL_ my review comments, then so be it. The next version is the last one I'm going to look at.
>
> Thanks,
>
> Tglx
Hi,
Sorry we end up in this situation.
I have removed PHI from:
- MSR definition,
- HWCAP2 bit,
- X86_CPU_FEATURE
Making kernel parameter non-phi would require implementing the ring3mwait=disable for any other non-ring 0 MWAIT (i.e AMD MWAITX).
My concern is that kernel will have to maintain various non architectural model specific stuff in single kernel parameter.
Best Regards,
Grzegorz
next prev parent reply other threads:[~2016-11-09 21:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-09 13:46 Grzegorz Andrejczuk
2016-11-09 13:46 ` [PATCH v9 1/4] x86/msr: add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bit Grzegorz Andrejczuk
2016-11-09 13:46 ` [PATCH v9 2/4] x86/elf: use HWCAP2 to expose ring 3 MWAIT Grzegorz Andrejczuk
2016-11-09 13:46 ` [PATCH v9 3/4] x86/cpufeature: add RING3MWAIT to CPU features Grzegorz Andrejczuk
2016-11-09 13:46 ` [PATCH v9 4/4] x86/cpufeatures: handle RING3MWAIT on Xeon Phi models Grzegorz Andrejczuk
2016-11-09 14:31 ` [PATCH v9 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Thomas Gleixner
2016-11-09 21:48 ` Andrejczuk, Grzegorz [this message]
2016-11-09 22:21 ` Thomas Gleixner
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