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From: "Bacchewar, Nilesh" <nilesh.bacchewar@intel.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>,
	"Krogerus, Heikki" <heikki.krogerus@linux.intel.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts
Date: Fri, 7 Oct 2016 18:17:36 +0000	[thread overview]
Message-ID: <EDC3C55F9AA4D042AD86F2BFE2FD250C017A8102@FMSMSX102.amr.corp.intel.com> (raw)
In-Reply-To: <CAHp75Veb7YwQNGugij_QGLi7rW6ohD52eRnX-aj4-nO=stxnjA@mail.gmail.com>

Here, Its marking  GPIO controller IRQ line as wake capable not GPIO lines.

Regards,
Nilesh

-----Original Message-----
From: Andy Shevchenko [mailto:andy.shevchenko@gmail.com] 
Sent: Friday, October 7, 2016 10:59 AM
To: Bacchewar, Nilesh <nilesh.bacchewar@intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>; Krogerus, Heikki <heikki.krogerus@linux.intel.com>; Linus Walleij <linus.walleij@linaro.org>; linux-gpio@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts

On Thu, Sep 22, 2016 at 2:03 AM, Nilesh Bacchewar <nilesh.bacchewar@intel.com> wrote:
> On some Intel BXT platform, wake-up from suspend-to-idle on pressing 
> power-button is not working. Its noticed that gpio-keys driver marking 
> the second level IRQ/power-button as wake capable but Intel pintctrl 
> driver is missing to mark GPIO chip/controller IRQ which first level 
> IRQ as wake cable if its GPIO pin IRQ is wakeble. So, though the first 
> level IRQ gets generated on power-button press, since it is not marked 
> as wake capable resume/wake-up flow is not happening.
> Intel pintctrl/GPIO driver need to mark GPIO chip/controller IRQ 
> (first level IRQ) as wake capable iff GPIO pin's IRQ (second level 
> IRQ) is marked as wake cable.

>         if (on)
> -               gpe_en |= BIT(gpp_offset);
> +               enable_irq_wake(pctrl->irq);
>         else
> -               gpe_en &= ~BIT(gpp_offset);
> -       writel(gpe_en, community->regs + GPI_GPE_EN + gpp * 4);
> -
> -       raw_spin_unlock_irqrestore(&pctrl->lock, flags);
> +               disable_irq_wake(pctrl->irq);

Shouldn't be refcounting here or I missed something?
What I think of is 2+ GPIO lines marked as wake capable IRQ sources and one of them is disabled earlier by some reason.

--
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2016-10-07 18:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-21 23:03 Nilesh Bacchewar
2016-10-07 17:59 ` Andy Shevchenko
2016-10-07 18:17   ` Bacchewar, Nilesh [this message]
2016-10-07 19:40     ` Andy Shevchenko
2016-10-09 14:59       ` Mika Westerberg
2016-10-09 17:06         ` Andy Shevchenko

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