From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: "Bacchewar, Nilesh" <nilesh.bacchewar@intel.com>,
"Krogerus, Heikki" <heikki.krogerus@linux.intel.com>,
Linus Walleij <linus.walleij@linaro.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts
Date: Sun, 9 Oct 2016 17:59:59 +0300 [thread overview]
Message-ID: <20161009145959.GX30800@lahna.fi.intel.com> (raw)
In-Reply-To: <CAHp75VcjwCR1W9+9wactFeGS4wEkLdU+PxbzvHXbwKK9NiBTmg@mail.gmail.com>
On Fri, Oct 07, 2016 at 10:40:42PM +0300, Andy Shevchenko wrote:
> On Fri, Oct 7, 2016 at 9:17 PM, Bacchewar, Nilesh
> <nilesh.bacchewar@intel.com> wrote:
> > Here, Its marking GPIO controller IRQ line as wake capable not GPIO lines.
>
> AFAIU this is called per (GPIO) pin which is IRQ enabled.
>
> Imagine a case when you have more than one such pin.
>
> 1. Set IRQ wake for pin 1
> 2. Set IRQ wake for pin 2 (assume that is pin under the question)
> 3. Unset IRQ wake for pin 1 (for some reason)
> 4. Global pinctrl IRQ wake is unset. Resulting same issue as before.
>
> What did I miss above?
enable/disable_irq_wake() include reference count.
next prev parent reply other threads:[~2016-10-09 15:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-21 23:03 Nilesh Bacchewar
2016-10-07 17:59 ` Andy Shevchenko
2016-10-07 18:17 ` Bacchewar, Nilesh
2016-10-07 19:40 ` Andy Shevchenko
2016-10-09 14:59 ` Mika Westerberg [this message]
2016-10-09 17:06 ` Andy Shevchenko
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