* [PATCH v3 0/2] drm/tegra: Support YVU formats
@ 2026-10-20 8:10 Aaron Kling via B4 Relay
2026-10-20 8:10 ` [PATCH v3 1/2] drm/tegra: Support swapping chroma planes Aaron Kling via B4 Relay
2026-10-20 8:10 ` [PATCH v3 2/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
0 siblings, 2 replies; 5+ messages in thread
From: Aaron Kling via B4 Relay @ 2026-10-20 8:10 UTC (permalink / raw)
To: Thierry Reding, Mikko Perttunen, David Airlie, Simona Vetter,
Jonathan Hunter
Cc: dri-devel, linux-tegra, linux-kernel, Aaron Kling
This is not directly supported by the display controller hardware.
However, this can be handled efficiently on tegradc by just passing the
chroma planes to the hardware backwards and reporting it as the yuv
equivalent. Nvdisplay has a hardware flag to handle the swap in
hardware.
YVU420 is required by AOSP for software decoded video playback among
other things. An attempt was made to handle this in gralloc by swapping
the chroma planes there, but it wasn't working. This kernel
implementation is working and is more generic anyways. This has been
verified on a SHIELD TV 2019 Pro for the tegradc path and a Jetson TX2
NX for the nvdisplay path.
---
Changes in v3:
- In patch 1, use the SWAP_UV window group flag instead of manually
swapping for nvdisplay
- In patch 2, support the chroma swapped variants of the other yuv types
- Link to v2: https://lore.kernel.org/r/20261018-tegra-drm-yvu420-v2-0-512889103ab4@gmail.com
Changes in v2:
- In patch 1, simplify pre-nvdisplay path to a swap of the window base
address
- In patch 1, address sashiko report about failure to copy the new
struct entry in duplicate_state
- In patch 2, address sashiko report that yvu420 was missing from
tegra20_overlays when the targets already support yuv420.
- Link to v1: https://lore.kernel.org/r/20261008-tegra-drm-yvu420-v1-0-dc1c443c00f3@gmail.com
---
Aaron Kling (2):
drm/tegra: Support swapping chroma planes
drm/tegra: Support YVU formats
drivers/gpu/drm/tegra/dc.c | 13 ++++++++++++-
drivers/gpu/drm/tegra/hub.c | 9 +++++++--
drivers/gpu/drm/tegra/plane.c | 29 ++++++++++++++++++++++++++++-
drivers/gpu/drm/tegra/plane.h | 3 ++-
4 files changed, 49 insertions(+), 5 deletions(-)
---
base-commit: 2efb7a11f1aa4d2dc285fe2680cca22cb9f72f64
change-id: 20261008-tegra-drm-yvu420-1dbb7140e54a
Best regards,
--
Aaron Kling <webgeek1234@gmail.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/2] drm/tegra: Support swapping chroma planes
2026-10-20 8:10 [PATCH v3 0/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
@ 2026-10-20 8:10 ` Aaron Kling via B4 Relay
2026-10-20 8:10 ` [PATCH v3 2/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
1 sibling, 0 replies; 5+ messages in thread
From: Aaron Kling via B4 Relay @ 2026-10-20 8:10 UTC (permalink / raw)
To: Thierry Reding, Mikko Perttunen, David Airlie, Simona Vetter,
Jonathan Hunter
Cc: dri-devel, linux-tegra, linux-kernel, Aaron Kling
From: Aaron Kling <webgeek1234@gmail.com>
The Tegra display controller supports some yuv types, but not their
chroma swapped variants. For example, yuv420 is supported but yvu420 is
not. For tegradc, this can be efficiently worked around by just passing
the hardware said chroma planes backwards. For nvdisplay, there is a
window group flag to do the swap in hardware. Add a flag to the plane
state struct and handling to both tegradc and nvdisplay paths.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
drivers/gpu/drm/tegra/dc.c | 6 +++++-
drivers/gpu/drm/tegra/hub.c | 7 +++++--
drivers/gpu/drm/tegra/plane.c | 5 ++++-
drivers/gpu/drm/tegra/plane.h | 3 ++-
4 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index b0bfa946e6979..39c2e920d76a6 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -740,7 +740,8 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
err = tegra_plane_format(new_plane_state->fb->format->format,
&plane_state->format,
- &plane_state->swap);
+ &plane_state->swap,
+ &plane_state->swap_uv);
if (err < 0)
return err;
@@ -872,6 +873,9 @@ static void tegra_plane_atomic_update(struct drm_plane *plane,
window.stride[i] = fb->pitches[i];
}
+ if (tegra_plane_state->swap_uv)
+ swap(window.base[1], window.base[2]);
+
tegra_dc_setup_window(p, &window);
}
diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c
index 448f49f3a7d7e..5a86f8260f136 100644
--- a/drivers/gpu/drm/tegra/hub.c
+++ b/drivers/gpu/drm/tegra/hub.c
@@ -440,7 +440,8 @@ static int tegra_shared_plane_atomic_check(struct drm_plane *plane,
err = tegra_plane_format(new_plane_state->fb->format->format,
&plane_state->format,
- &plane_state->swap);
+ &plane_state->swap,
+ &plane_state->swap_uv);
if (err < 0)
return err;
@@ -642,7 +643,9 @@ static void tegra_shared_plane_atomic_update(struct drm_plane *plane,
base |= addr_flag;
tegra_plane_writel(p, tegra_plane_state->format, DC_WIN_COLOR_DEPTH);
- tegra_plane_writel(p, 0, DC_WIN_PRECOMP_WGRP_PARAMS);
+
+ value = tegra_plane_state->swap_uv ? SWAP_UV : 0;
+ tegra_plane_writel(p, value, DC_WIN_PRECOMP_WGRP_PARAMS);
value = V_POSITION(new_state->crtc_y) |
H_POSITION(new_state->crtc_x);
diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
index 2148b0c59815c..757bc552809fe 100644
--- a/drivers/gpu/drm/tegra/plane.c
+++ b/drivers/gpu/drm/tegra/plane.c
@@ -59,6 +59,7 @@ tegra_plane_atomic_duplicate_state(struct drm_plane *plane)
copy->tiling = state->tiling;
copy->format = state->format;
copy->swap = state->swap;
+ copy->swap_uv = state->swap_uv;
copy->reflect_x = state->reflect_x;
copy->reflect_y = state->reflect_y;
copy->opaque = state->opaque;
@@ -319,11 +320,13 @@ int tegra_plane_state_add(struct tegra_plane *plane,
return 0;
}
-int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap)
+int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap, bool *swap_uv)
{
/* assume no swapping of fetched data */
if (swap)
*swap = BYTE_SWAP_NOSWAP;
+ if (swap_uv)
+ *swap_uv = false;
switch (fourcc) {
case DRM_FORMAT_ARGB4444:
diff --git a/drivers/gpu/drm/tegra/plane.h b/drivers/gpu/drm/tegra/plane.h
index e33a581e6490e..dba5f1b254e98 100644
--- a/drivers/gpu/drm/tegra/plane.h
+++ b/drivers/gpu/drm/tegra/plane.h
@@ -49,6 +49,7 @@ struct tegra_plane_state {
struct tegra_bo_tiling tiling;
u32 format;
u32 swap;
+ bool swap_uv;
bool reflect_x;
bool reflect_y;
@@ -88,7 +89,7 @@ void tegra_plane_cleanup_fb(struct drm_plane *plane,
int tegra_plane_state_add(struct tegra_plane *plane,
struct drm_plane_state *state);
-int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap);
+int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap, bool *swap_uv);
bool tegra_plane_format_is_indexed(unsigned int format);
bool tegra_plane_format_is_yuv(unsigned int format, unsigned int *planes, unsigned int *bpc);
int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
--
2.54.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 2/2] drm/tegra: Support YVU formats
2026-10-20 8:10 [PATCH v3 0/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
2026-10-20 8:10 ` [PATCH v3 1/2] drm/tegra: Support swapping chroma planes Aaron Kling via B4 Relay
@ 2026-10-20 8:10 ` Aaron Kling via B4 Relay
2026-10-23 12:10 ` Mikko Perttunen
1 sibling, 1 reply; 5+ messages in thread
From: Aaron Kling via B4 Relay @ 2026-10-20 8:10 UTC (permalink / raw)
To: Thierry Reding, Mikko Perttunen, David Airlie, Simona Vetter,
Jonathan Hunter
Cc: dri-devel, linux-tegra, linux-kernel, Aaron Kling
From: Aaron Kling <webgeek1234@gmail.com>
YVU420 is used by AOSP for video playback among other things. YVU422 and
YVU444 can be trivially supported in the same manner, so add them as
well.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
drivers/gpu/drm/tegra/dc.c | 7 +++++++
drivers/gpu/drm/tegra/hub.c | 2 ++
drivers/gpu/drm/tegra/plane.c | 24 ++++++++++++++++++++++++
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 39c2e920d76a6..be913f2609077 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -1282,6 +1282,8 @@ static const u32 tegra20_overlay_formats[] = {
DRM_FORMAT_YUYV,
DRM_FORMAT_YUV420,
DRM_FORMAT_YUV422,
+ DRM_FORMAT_YVU420,
+ DRM_FORMAT_YVU422,
};
static const u32 tegra114_overlay_formats[] = {
@@ -1309,6 +1311,8 @@ static const u32 tegra114_overlay_formats[] = {
DRM_FORMAT_YUYV,
DRM_FORMAT_YUV420,
DRM_FORMAT_YUV422,
+ DRM_FORMAT_YVU420,
+ DRM_FORMAT_YVU422,
/* semi-planar formats */
DRM_FORMAT_NV12,
DRM_FORMAT_NV21,
@@ -1349,6 +1353,9 @@ static const u32 tegra124_overlay_formats[] = {
DRM_FORMAT_YUV420, /* YU12 */
DRM_FORMAT_YUV422, /* YU16 */
DRM_FORMAT_YUV444, /* YU24 */
+ DRM_FORMAT_YVU420, /* YV12 */
+ DRM_FORMAT_YVU422, /* YV16 */
+ DRM_FORMAT_YVU444, /* YV24 */
/* semi-planar formats */
DRM_FORMAT_NV12,
DRM_FORMAT_NV21,
diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c
index 5a86f8260f136..ac4542e54d7dd 100644
--- a/drivers/gpu/drm/tegra/hub.c
+++ b/drivers/gpu/drm/tegra/hub.c
@@ -51,6 +51,8 @@ static const u32 tegra_shared_plane_formats[] = {
DRM_FORMAT_YUYV,
DRM_FORMAT_YUV420,
DRM_FORMAT_YUV422,
+ DRM_FORMAT_YVU420,
+ DRM_FORMAT_YVU422,
};
static const u64 tegra_shared_plane_modifiers[] = {
diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
index 757bc552809fe..79ef5fc1b3678 100644
--- a/drivers/gpu/drm/tegra/plane.c
+++ b/drivers/gpu/drm/tegra/plane.c
@@ -433,14 +433,38 @@ int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap, bool *swap_uv)
*format = WIN_COLOR_DEPTH_YCbCr420P;
break;
+ case DRM_FORMAT_YVU420:
+ if (!swap_uv)
+ return -EINVAL;
+
+ *format = WIN_COLOR_DEPTH_YCbCr420P;
+ *swap_uv = true;
+ break;
+
case DRM_FORMAT_YUV422:
*format = WIN_COLOR_DEPTH_YCbCr422P;
break;
+ case DRM_FORMAT_YVU422:
+ if (!swap_uv)
+ return -EINVAL;
+
+ *format = WIN_COLOR_DEPTH_YCbCr422P;
+ *swap_uv = true;
+ break;
+
case DRM_FORMAT_YUV444:
*format = WIN_COLOR_DEPTH_YCbCr444P;
break;
+ case DRM_FORMAT_YVU444:
+ if (!swap_uv)
+ return -EINVAL;
+
+ *format = WIN_COLOR_DEPTH_YCbCr444P;
+ *swap_uv = true;
+ break;
+
case DRM_FORMAT_NV12:
*format = WIN_COLOR_DEPTH_YCbCr420SP;
break;
--
2.54.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] drm/tegra: Support YVU formats
2026-10-20 8:10 ` [PATCH v3 2/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
@ 2026-10-23 12:10 ` Mikko Perttunen
2026-10-23 17:10 ` Aaron Kling
0 siblings, 1 reply; 5+ messages in thread
From: Mikko Perttunen @ 2026-10-23 12:10 UTC (permalink / raw)
To: Thierry Reding, David Airlie, Simona Vetter, Jonathan Hunter,
linux-tegra
Cc: dri-devel, linux-tegra, linux-kernel, Aaron Kling, webgeek1234
On Tuesday, October 20, 2026 5:10 PM Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@gmail.com>
>
> YVU420 is used by AOSP for video playback among other things. YVU422 and
> YVU444 can be trivially supported in the same manner, so add them as
> well.
>
> Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> ---
> drivers/gpu/drm/tegra/dc.c | 7 +++++++
> drivers/gpu/drm/tegra/hub.c | 2 ++
> drivers/gpu/drm/tegra/plane.c | 24 ++++++++++++++++++++++++
> 3 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> index 39c2e920d76a6..be913f2609077 100644
> --- a/drivers/gpu/drm/tegra/dc.c
> +++ b/drivers/gpu/drm/tegra/dc.c
> @@ -1282,6 +1282,8 @@ static const u32 tegra20_overlay_formats[] = {
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YUV420,
> DRM_FORMAT_YUV422,
> + DRM_FORMAT_YVU420,
> + DRM_FORMAT_YVU422,
> };
>
> static const u32 tegra114_overlay_formats[] = {
> @@ -1309,6 +1311,8 @@ static const u32 tegra114_overlay_formats[] = {
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YUV420,
> DRM_FORMAT_YUV422,
> + DRM_FORMAT_YVU420,
> + DRM_FORMAT_YVU422,
> /* semi-planar formats */
> DRM_FORMAT_NV12,
> DRM_FORMAT_NV21,
> @@ -1349,6 +1353,9 @@ static const u32 tegra124_overlay_formats[] = {
> DRM_FORMAT_YUV420, /* YU12 */
> DRM_FORMAT_YUV422, /* YU16 */
> DRM_FORMAT_YUV444, /* YU24 */
> + DRM_FORMAT_YVU420, /* YV12 */
> + DRM_FORMAT_YVU422, /* YV16 */
> + DRM_FORMAT_YVU444, /* YV24 */
> /* semi-planar formats */
> DRM_FORMAT_NV12,
> DRM_FORMAT_NV21,
> diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c
> index 5a86f8260f136..ac4542e54d7dd 100644
> --- a/drivers/gpu/drm/tegra/hub.c
> +++ b/drivers/gpu/drm/tegra/hub.c
> @@ -51,6 +51,8 @@ static const u32 tegra_shared_plane_formats[] = {
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YUV420,
> DRM_FORMAT_YUV422,
> + DRM_FORMAT_YVU420,
> + DRM_FORMAT_YVU422,
> };
Well, I just tested this and it looks like the nvdisplay/hub.c based
display controllers don't support planar YUV422. So that's an existing
bug in the driver but I think anyway we shouldn't advertise YVU422.. :)
Could you respin one more time and drop YVU422 from hub.c? You can add a
patch to drop YUV422 as well or I can follow up with one, either way is
fine by me.
Thanks
Mikko
>
> static const u64 tegra_shared_plane_modifiers[] = {
> diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
> index 757bc552809fe..79ef5fc1b3678 100644
> --- a/drivers/gpu/drm/tegra/plane.c
> +++ b/drivers/gpu/drm/tegra/plane.c
> @@ -433,14 +433,38 @@ int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap, bool *swap_uv)
> *format = WIN_COLOR_DEPTH_YCbCr420P;
> break;
>
> + case DRM_FORMAT_YVU420:
> + if (!swap_uv)
> + return -EINVAL;
> +
> + *format = WIN_COLOR_DEPTH_YCbCr420P;
> + *swap_uv = true;
> + break;
> +
> case DRM_FORMAT_YUV422:
> *format = WIN_COLOR_DEPTH_YCbCr422P;
> break;
>
> + case DRM_FORMAT_YVU422:
> + if (!swap_uv)
> + return -EINVAL;
> +
> + *format = WIN_COLOR_DEPTH_YCbCr422P;
> + *swap_uv = true;
> + break;
> +
> case DRM_FORMAT_YUV444:
> *format = WIN_COLOR_DEPTH_YCbCr444P;
> break;
>
> + case DRM_FORMAT_YVU444:
> + if (!swap_uv)
> + return -EINVAL;
> +
> + *format = WIN_COLOR_DEPTH_YCbCr444P;
> + *swap_uv = true;
> + break;
> +
> case DRM_FORMAT_NV12:
> *format = WIN_COLOR_DEPTH_YCbCr420SP;
> break;
>
> --
> 2.54.0
>
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] drm/tegra: Support YVU formats
2026-10-23 12:10 ` Mikko Perttunen
@ 2026-10-23 17:10 ` Aaron Kling
0 siblings, 0 replies; 5+ messages in thread
From: Aaron Kling @ 2026-10-23 17:10 UTC (permalink / raw)
To: Mikko Perttunen
Cc: Thierry Reding, David Airlie, Simona Vetter, Jonathan Hunter,
linux-tegra, dri-devel, linux-kernel
On Fri, Oct 23, 2026 at 7:10 AM Mikko Perttunen <mperttunen@nvidia.com> wrote:
>
> On Tuesday, October 20, 2026 5:10 PM Aaron Kling via B4 Relay wrote:
> > From: Aaron Kling <webgeek1234@gmail.com>
> >
> > YVU420 is used by AOSP for video playback among other things. YVU422 and
> > YVU444 can be trivially supported in the same manner, so add them as
> > well.
> >
> > Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> > ---
> > drivers/gpu/drm/tegra/dc.c | 7 +++++++
> > drivers/gpu/drm/tegra/hub.c | 2 ++
> > drivers/gpu/drm/tegra/plane.c | 24 ++++++++++++++++++++++++
> > 3 files changed, 33 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> > index 39c2e920d76a6..be913f2609077 100644
> > --- a/drivers/gpu/drm/tegra/dc.c
> > +++ b/drivers/gpu/drm/tegra/dc.c
> > @@ -1282,6 +1282,8 @@ static const u32 tegra20_overlay_formats[] = {
> > DRM_FORMAT_YUYV,
> > DRM_FORMAT_YUV420,
> > DRM_FORMAT_YUV422,
> > + DRM_FORMAT_YVU420,
> > + DRM_FORMAT_YVU422,
> > };
> >
> > static const u32 tegra114_overlay_formats[] = {
> > @@ -1309,6 +1311,8 @@ static const u32 tegra114_overlay_formats[] = {
> > DRM_FORMAT_YUYV,
> > DRM_FORMAT_YUV420,
> > DRM_FORMAT_YUV422,
> > + DRM_FORMAT_YVU420,
> > + DRM_FORMAT_YVU422,
> > /* semi-planar formats */
> > DRM_FORMAT_NV12,
> > DRM_FORMAT_NV21,
> > @@ -1349,6 +1353,9 @@ static const u32 tegra124_overlay_formats[] = {
> > DRM_FORMAT_YUV420, /* YU12 */
> > DRM_FORMAT_YUV422, /* YU16 */
> > DRM_FORMAT_YUV444, /* YU24 */
> > + DRM_FORMAT_YVU420, /* YV12 */
> > + DRM_FORMAT_YVU422, /* YV16 */
> > + DRM_FORMAT_YVU444, /* YV24 */
> > /* semi-planar formats */
> > DRM_FORMAT_NV12,
> > DRM_FORMAT_NV21,
> > diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c
> > index 5a86f8260f136..ac4542e54d7dd 100644
> > --- a/drivers/gpu/drm/tegra/hub.c
> > +++ b/drivers/gpu/drm/tegra/hub.c
> > @@ -51,6 +51,8 @@ static const u32 tegra_shared_plane_formats[] = {
> > DRM_FORMAT_YUYV,
> > DRM_FORMAT_YUV420,
> > DRM_FORMAT_YUV422,
> > + DRM_FORMAT_YVU420,
> > + DRM_FORMAT_YVU422,
> > };
>
> Well, I just tested this and it looks like the nvdisplay/hub.c based
> display controllers don't support planar YUV422. So that's an existing
> bug in the driver but I think anyway we shouldn't advertise YVU422.. :)
>
> Could you respin one more time and drop YVU422 from hub.c? You can add a
> patch to drop YUV422 as well or I can follow up with one, either way is
> fine by me.
I can send a new revision, sure. Dropping yuv422 from nvdisplay seems
out of scope of the series, though. I'd think it would make more sense
to make that standalone with a fixes tag so it can move more quickly.
Aaron
> Thanks
> Mikko
>
> >
> > static const u64 tegra_shared_plane_modifiers[] = {
> > diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
> > index 757bc552809fe..79ef5fc1b3678 100644
> > --- a/drivers/gpu/drm/tegra/plane.c
> > +++ b/drivers/gpu/drm/tegra/plane.c
> > @@ -433,14 +433,38 @@ int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap, bool *swap_uv)
> > *format = WIN_COLOR_DEPTH_YCbCr420P;
> > break;
> >
> > + case DRM_FORMAT_YVU420:
> > + if (!swap_uv)
> > + return -EINVAL;
> > +
> > + *format = WIN_COLOR_DEPTH_YCbCr420P;
> > + *swap_uv = true;
> > + break;
> > +
> > case DRM_FORMAT_YUV422:
> > *format = WIN_COLOR_DEPTH_YCbCr422P;
> > break;
> >
> > + case DRM_FORMAT_YVU422:
> > + if (!swap_uv)
> > + return -EINVAL;
> > +
> > + *format = WIN_COLOR_DEPTH_YCbCr422P;
> > + *swap_uv = true;
> > + break;
> > +
> > case DRM_FORMAT_YUV444:
> > *format = WIN_COLOR_DEPTH_YCbCr444P;
> > break;
> >
> > + case DRM_FORMAT_YVU444:
> > + if (!swap_uv)
> > + return -EINVAL;
> > +
> > + *format = WIN_COLOR_DEPTH_YCbCr444P;
> > + *swap_uv = true;
> > + break;
> > +
> > case DRM_FORMAT_NV12:
> > *format = WIN_COLOR_DEPTH_YCbCr420SP;
> > break;
> >
> > --
> > 2.54.0
> >
> >
> >
>
>
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-10-23 17:10 UTC | newest]
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2026-10-20 8:10 [PATCH v3 0/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
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2026-10-20 8:10 ` [PATCH v3 2/2] drm/tegra: Support YVU formats Aaron Kling via B4 Relay
2026-10-23 12:10 ` Mikko Perttunen
2026-10-23 17:10 ` Aaron Kling
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