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From: Borislav Petkov <bp@alien8.de>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Ser Olmy <ser.olmy@protonmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [regression] commit d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
Date: Thu, 14 Oct 2021 16:44:27 +0200	[thread overview]
Message-ID: <YWhCS2wSSu8rq/Ae@zn.tnic> (raw)
In-Reply-To: <YWg/5h3OcQKE94Nz@intel.com>

On Thu, Oct 14, 2021 at 05:34:14PM +0300, Ville Syrjälä wrote:
> > > Tested the same disk on on both a 64bit capable Pentium D
> > > and a 32bit only Pentium 4 just to rule out the specific CPU.
> > > Busted on both.
> > 
> > So that's a purely 32-bit installation and a 32-bit kernel and you've
> > booted it on two different machines?
> 
> Yes.

This is insane, grrr!

So Ser's report was about an old 32-bit Intel CPU failing:

https://lore.kernel.org/all/YVtA67jImg3KlBTw@zn.tnic/T/#u

so if we revert, it'll break booting on his machine.

Can you give /proc/cpuinfo from your machines?

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  parent reply	other threads:[~2021-10-14 14:44 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-14 11:44 Ville Syrjälä
2021-10-14 14:27 ` Borislav Petkov
2021-10-14 14:34   ` Ville Syrjälä
2021-10-14 14:43     ` Ville Syrjälä
2021-10-14 14:56       ` Borislav Petkov
2021-10-14 15:03         ` Ville Syrjälä
2021-10-14 17:45           ` Ville Syrjälä
2021-10-14 18:01             ` Borislav Petkov
2021-10-14 18:46               ` Ville Syrjälä
2021-10-14 19:08                 ` Borislav Petkov
2021-10-15 11:04                   ` Borislav Petkov
2021-10-16  7:26                     ` Ser Olmy
2021-10-16 10:35                       ` Borislav Petkov
2021-10-18  6:55                     ` Ville Syrjälä
2021-10-14 14:44     ` Borislav Petkov [this message]
2021-10-16 12:22 ` [tip: x86/urgent] x86/fpu: Mask out the invalid MXCSR bits properly tip-bot2 for Borislav Petkov

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