From: Greg KH <gregkh@linuxfoundation.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: lee.jones@linaro.org, hdegoede@redhat.com, bhelgaas@google.com,
andriy.shevchenko@linux.intel.com, srinivas.pandruvada@intel.com,
mgross@linux.intel.com, linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/4] PCI: Add #defines for accessing PCIe DVSEC fields
Date: Sun, 21 Nov 2021 13:24:09 +0100 [thread overview]
Message-ID: <YZo6aczgqoobIcDC@kroah.com> (raw)
In-Reply-To: <20211120231705.189969-2-david.e.box@linux.intel.com>
On Sat, Nov 20, 2021 at 03:17:02PM -0800, David E. Box wrote:
> Add #defines for accessing Vendor ID, Revision, Length, and ID offsets
> in the Designated Vendor Specific Extended Capability (DVSEC). Defined
> in PCIe r5.0, sec 7.9.6.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> include/uapi/linux/pci_regs.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index ff6ccbc6efe9..318f3f1f9e92 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -1086,7 +1086,11 @@
>
> /* Designated Vendor-Specific (DVSEC, PCI_EXT_CAP_ID_DVSEC) */
> #define PCI_DVSEC_HEADER1 0x4 /* Designated Vendor-Specific Header1 */
> +#define PCI_DVSEC_HEADER1_VID(x) ((x) & 0xffff)
> +#define PCI_DVSEC_HEADER1_REV(x) (((x) >> 16) & 0xf)
> +#define PCI_DVSEC_HEADER1_LEN(x) (((x) >> 20) & 0xfff)
> #define PCI_DVSEC_HEADER2 0x8 /* Designated Vendor-Specific Header2 */
> +#define PCI_DVSEC_HEADER2_ID(x) ((x) & 0xffff)
Why does userspace need to have these defines? What userspace tool is
going to use these?
thanks,
greg k-h
next prev parent reply other threads:[~2021-11-21 12:24 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-20 23:17 [PATCH 0/4] Auxiliary bus driver support for Intel PCIe VSEC/DVSEC David E. Box
2021-11-20 23:17 ` [PATCH 1/4] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-11-21 12:24 ` Greg KH [this message]
2021-11-21 15:48 ` David E. Box
2021-11-22 18:28 ` Bjorn Helgaas
2021-11-20 23:17 ` [PATCH 2/4] driver core: auxiliary bus: Add driver data helpers David E. Box
2021-11-20 23:17 ` [PATCH 3/4] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-11-22 18:43 ` Bjorn Helgaas
2021-11-22 23:09 ` David E. Box
2021-11-20 23:17 ` [PATCH 4/4] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-11-21 12:31 ` Greg KH
2021-11-21 17:18 ` David E. Box
2021-11-22 6:21 ` Greg KH
2021-11-22 14:51 ` David E. Box
2021-11-22 18:44 ` Bjorn Helgaas
2021-11-22 23:20 ` David E. Box
-- strict thread matches above, loose matches on Subject: below --
2021-06-17 21:54 [PATCH 0/4] MFD: intel_pmt: Split OOBMSM from intel_pmt driver David E. Box
2021-06-17 21:54 ` [PATCH 1/4] PCI: Add #defines for accessing PCIE DVSEC fields David E. Box
2021-06-22 15:04 ` Bjorn Helgaas
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