From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Tony Luck <tony.luck@intel.com>,
Fenghua Yu <fenghua.yu@intel.com>,
Reinette Chatre <reinette.chatre@intel.com>,
Peter Newman <peternewman@google.com>,
x86@kernel.org
Cc: Shaopeng Tan <tan.shaopeng@fujitsu.com>,
James Morse <james.morse@arm.com>,
Jamie Iles <quic_jiles@quicinc.com>,
Babu Moger <babu.moger@amd.com>,
Randy Dunlap <rdunlap@infradead.org>,
linux-kernel@vger.kernel.org, patches@lists.linux.dev
Subject: Re: [PATCH] x86/resctrl: Fix unused variable warning in cache_alloc_hsw_probe()
Date: Wed, 1 Nov 2023 16:43:12 +0700 [thread overview]
Message-ID: <ZUIdsK5LGmRww9ER@debian.me> (raw)
In-Reply-To: <20231031220534.37730-1-tony.luck@intel.com>
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On Tue, Oct 31, 2023 at 03:05:34PM -0700, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
>
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
>
> Fix by switching from rdmsr() to rdmsrl() using a single u64 argument
> for the MSR value instead of the pair of u32 for the high and low
> halves.
>
> Signed-off-by: Tony Luck <tony.luck@intel.com>
> ---
> This has been annoying me for a while as the only warning from the
> resctrl code when building with W=1.
>
> N.B. compile tested only. I don't have a Haswell system to check this works.
>
> arch/x86/kernel/cpu/resctrl/core.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 19e0681f0435..4084131d391d 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -136,15 +136,16 @@ static inline void cache_alloc_hsw_probe(void)
> {
> struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
> struct rdt_resource *r = &hw_res->r_resctrl;
> - u32 l, h, max_cbm = BIT_MASK(20) - 1;
> + u32 max_cbm = BIT_MASK(20) - 1;
> + u64 l3_cbm_0;
>
> if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> return;
>
> - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>
> /* If all the bits were set in MSR, return success */
> - if (l != max_cbm)
> + if (l3_cbm_0 != max_cbm)
> return;
>
> hw_res->num_closid = 4;
No noticeable regressions on my Acer Aspire E15 (the laptop uses Intel Core
i3 Haswell), thanks!
Tested-by: Bagas Sanjaya <bagasdotme@gmail.com>
--
An old man doll... just what I always wanted! - Clara
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next prev parent reply other threads:[~2023-11-01 9:43 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 22:05 Tony Luck
2023-11-01 9:43 ` Bagas Sanjaya [this message]
2023-11-01 14:33 ` Luck, Tony
2023-11-01 20:26 ` Moger, Babu
2023-11-01 20:33 ` Luck, Tony
2023-11-01 20:42 ` Moger, Babu
2023-11-01 21:26 ` [PATCH v2] " Tony Luck
2023-11-02 13:02 ` Moger, Babu
2023-11-02 21:34 ` Reinette Chatre
2023-11-02 22:02 ` Luck, Tony
2023-11-02 22:23 ` Reinette Chatre
2023-11-02 22:50 ` Luck, Tony
2023-11-03 20:23 ` Reinette Chatre
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