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From: Tony Luck <tony.luck@intel.com>
To: "Moger, Babu" <babu.moger@amd.com>
Cc: "Yu, Fenghua" <fenghua.yu@intel.com>,
	"Chatre, Reinette" <reinette.chatre@intel.com>,
	Peter Newman <peternewman@google.com>,
	"x86@kernel.org" <x86@kernel.org>,
	Shaopeng Tan <tan.shaopeng@fujitsu.com>,
	James Morse <james.morse@arm.com>,
	Jamie Iles <quic_jiles@quicinc.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"patches@lists.linux.dev" <patches@lists.linux.dev>
Subject: [PATCH v2] x86/resctrl: Fix unused variable warning in cache_alloc_hsw_probe()
Date: Wed, 1 Nov 2023 14:26:15 -0700	[thread overview]
Message-ID: <ZULCd/TGJL9Dmncf@agluck-desk3> (raw)
In-Reply-To: <9e6a979a-48db-4b25-884f-ac8d4c2bb078@amd.com>

In a "W=1" build gcc throws a warning:

arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used

Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr()
to rdmsrl() using a single u64 argument for the MSR value instead of
the pair of u32 for the high and low halves.

Signed-off-by: Tony Luck <tony.luck@intel.com>
---
Changes since v1 (suggested by Babu)

Switch both the wrmsr() and rdmsr() to the 64-bit versions.

 arch/x86/kernel/cpu/resctrl/core.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 19e0681f0435..d29ebe345de6 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -136,15 +136,15 @@ static inline void cache_alloc_hsw_probe(void)
 {
 	struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
 	struct rdt_resource *r  = &hw_res->r_resctrl;
-	u32 l, h, max_cbm = BIT_MASK(20) - 1;
+	u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0;
 
-	if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
+	if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm))
 		return;
 
-	rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
+	rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
 
 	/* If all the bits were set in MSR, return success */
-	if (l != max_cbm)
+	if (l3_cbm_0 != max_cbm)
 		return;
 
 	hw_res->num_closid = 4;
-- 
2.41.0


  reply	other threads:[~2023-11-01 21:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-31 22:05 [PATCH] " Tony Luck
2023-11-01  9:43 ` Bagas Sanjaya
2023-11-01 14:33   ` Luck, Tony
2023-11-01 20:26 ` Moger, Babu
2023-11-01 20:33   ` Luck, Tony
2023-11-01 20:42     ` Moger, Babu
2023-11-01 21:26       ` Tony Luck [this message]
2023-11-02 13:02         ` [PATCH v2] " Moger, Babu
2023-11-02 21:34         ` Reinette Chatre
2023-11-02 22:02           ` Luck, Tony
2023-11-02 22:23             ` Reinette Chatre
2023-11-02 22:50               ` Luck, Tony
2023-11-03 20:23                 ` Reinette Chatre

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