From: Daniel Golle <daniel@makrotopia.org>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Bartosz Golaszewski <brgl@bgdev.pl>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v2 net-next 3/3] net: phy: aquantia: add support for aqr115c
Date: Fri, 28 Jun 2024 02:11:07 +0100 [thread overview]
Message-ID: <Zn4Nq1QvhjAUaogb@makrotopia.org> (raw)
In-Reply-To: <d227011a-b4bf-427f-85c2-5db61ad0086c@lunn.ch>
On Fri, Jun 28, 2024 at 02:18:45AM +0200, Andrew Lunn wrote:
> On Thu, Jun 27, 2024 at 11:42:45PM +0100, Daniel Golle wrote:
> > Hi Bartosz,
> >
> > On Thu, Jun 27, 2024 at 01:30:17PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> > >
> > > Add support for a new model to the Aquantia driver. This PHY supports
> > > Overlocked SGMII mode with 2.5G speeds.
> >
> > I don't think that there is such a thing as "Overclocked SGMII mode with
> > 2.5G speed".
>
> Unfortunately, there is. A number of vendors say they do this, without
> saying quite what they actually do. As you point out, symbol
> replication does not work, and in-band signalling also makes no
> sense. So they throw all that away. Leaving just the higher clock
> rate, single speed, and no in-band signalling.
>
> In the end, that looks very similar to 2500BaseX with broken inband
> signalling.
Let's call it that then: "2500Base-X with broken in-band signalling".
MaxLinear describes that quite clearly in their (open!) datasheets[1],
and gives some insight into the (mis-)use of the term "SGMII" in the
industry as synonymous to just any type of serialized Ethernet MII:
"
3.4 SGMII Interface
The GPY211 implements a serial data interface, called SGMII or SerDes,
to connect to another chip implementing the MAC layer (MAC SoC).
"
(page 32)
Later on they mention that
"
3.4.7 Auto-negotiation Modes Supported by SGMII
Two modes are supported for the SGMII auto-negotiation protocol:
* Cisco* Serial-GMII Specification 1.8 [4]
* 1000BX IEEE 802.3 following IEEE Clause 37 [2]
"
(page 37)
Aquantia's datasheets are only available under NDA, so I cannot quote
them directly, but I can tell you that their definition of "SGMII" is
pretty similar to that of MaxLinear.
>
> > Hence I assume that what you meant to say here is that the PHY uses
> > 2500Base-X as interface mode and performs rate-adaptation for speeds
> > less than 2500M (or half-duplex) using pause frames.
>
> Not all systems assume rate adaptation. Some are known to use SGMII
> for 10/100/1G with inband signalling, and then swap to 2500BaseX
> without inband-signalling for 2.5G operation!
Yes, most 2.5G PHYs out there (MaxLinear, RealTek) actually support both,
with interface-mode switching being the better option compared to often
rather problematic rate-adaptation...
When it comes to Aquantia we are using 2500Base-X with rate adaptation
for the older 2.5G PHYs, so I assume the newer ones would not differ in
that regard. Or rather: If we were to introduce interface-mode-switching
also for the Aquantia 2.5G PHYs then we should try doing it for all of
them at least.
>
> 2.5G is a mess.
+1
[1]: https://assets.maxlinear.com/web/documents/617810_gpy211b1vc_gpy211c0vc_ds_rev1.4.pdf
next prev parent reply other threads:[~2024-06-28 1:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 11:30 [PATCH v2 net-next 0/3] net: phy: aquantia: enable " Bartosz Golaszewski
2024-06-27 11:30 ` [PATCH v2 net-next 1/3] net: phy: aquantia: rename and export aqr107_wait_reset_complete() Bartosz Golaszewski
2024-06-27 16:20 ` Andrew Lunn
2024-06-27 11:30 ` [PATCH v2 net-next 2/3] net: phy: aquantia: wait for FW reset before checking the vendor ID Bartosz Golaszewski
2024-06-27 16:21 ` Andrew Lunn
2024-06-27 11:30 ` [PATCH v2 net-next 3/3] net: phy: aquantia: add support for aqr115c Bartosz Golaszewski
2024-06-27 12:09 ` Russell King (Oracle)
2024-06-27 12:18 ` Bartosz Golaszewski
2024-06-27 16:22 ` Andrew Lunn
2024-06-27 16:48 ` Bartosz Golaszewski
2024-06-27 22:42 ` Daniel Golle
2024-06-28 0:18 ` Andrew Lunn
2024-06-28 1:11 ` Daniel Golle [this message]
2024-06-28 12:11 ` Bartosz Golaszewski
2024-06-28 14:09 ` Andrew Lunn
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