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From: Yanjun Yang <yangyj.ee@gmail.com>
To: Philippe CORNU <philippe.cornu@foss.st.com>
Cc: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>,
	Yannick Fertre <yannick.fertre@foss.st.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-stm32@st-md-mailman.stormreply.com,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [Linux-stm32] [PATCH RESEND v3 0/3] Update STM DSI PHY driver
Date: Mon, 29 Jul 2024 21:28:48 +0800	[thread overview]
Message-ID: <ZqeZEB9peRSQkOLZ@void.tail05c47.ts.net> (raw)
In-Reply-To: <e059f157-ff9c-32cb-57a6-48f2331f2555@foss.st.com>

On Fri, Jul 26, 2024 at 09:55:35AM +0200, Philippe CORNU wrote:
> 
> 
> On 7/22/24 10:38, Yanjun Yang wrote:
> > 
> > This patch (commit id:185f99b614427360) seems to break the dsi of
> > stm32f469 chip.
> > I'm not familiar with the drm and the clock framework, maybe it's
> > because there is no
> >   "ck_dsi_phy" defined for stm32f469.
> > PS:  Sorry for receiving multiple copies of this email, I forgot to
> > use plain text mode last time.
> > 
> 
> Hi,
> Thank you for letting us know that there was this error. We should have
> detected this before merging, really sorry for the problems caused by this
> patch. We will investigate the issue and get back to you as soon as
> possible. In the meantime, I think you can revert this patch in your git
> tree.
> 
> Philippe :-)
> 

Hi,
After some testing, the reason behind my problem is the parent's name of
'clk_dsi_phy' for stm32f4 is 'clk-hse' other than 'ck_hse'.  I don't
know which is the better why to fix it:
1. Change "ck_hse" to "clk-hse" in where "clk_dsi_phy" is defined.
2. Use "pll_in_khz = clk_get_rate(dsi->pllref_clk) / 1000" instead of
   "pll_in_khz = (unsigned int)(parent_rate / 1000)" when get the clock
   rate.

Both method can fix my problem. The first one might break other
platforms. Maybe I should change the clock name of 'clk-hse'. However,
I can't find the defination of this clock name for stm32f4.

  reply	other threads:[~2024-07-29 13:28 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-29 10:41 Raphael Gallais-Pou
2024-01-29 10:41 ` [PATCH RESEND v3 1/3] drm/stm: dsi: use new SYSTEM_SLEEP_PM_OPS() macro Raphael Gallais-Pou
2024-06-21 12:50   ` Yannick FERTRE
2024-01-29 10:41 ` [PATCH RESEND v3 2/3] drm/stm: dsi: add pm runtime ops Raphael Gallais-Pou
2024-06-21 12:50   ` Yannick FERTRE
2024-01-29 10:41 ` [PATCH RESEND v3 3/3] drm/stm: dsi: expose DSI PHY internal clock Raphael Gallais-Pou
2024-06-21 12:51   ` Yannick FERTRE
2024-06-28 12:45 ` [PATCH RESEND v3 0/3] Update STM DSI PHY driver Philippe CORNU
2024-07-22  8:38   ` [Linux-stm32] " Yanjun Yang
2024-07-26  7:55     ` Philippe CORNU
2024-07-29 13:28       ` Yanjun Yang [this message]
2024-08-01  9:07         ` Raphaël Gallais-Pou
2024-08-09 15:12           ` Yannick FERTRE

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