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From: JieGan <quic_jiegan@quicinc.com>
To: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Jinlong Mao <quic_jinlmao@quicinc.com>,
	<coresight@lists.linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Tingwei Zhang <quic_tingweiz@quicinc.com>,
	Yuanfang Zhang <quic_yuanfang@quicinc.com>,
	"Tao Zhang" <quic_taozha@quicinc.com>,
	Song Chai <quic_songchai@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH v4 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware
Date: Thu, 29 Aug 2024 09:22:52 +0800	[thread overview]
Message-ID: <Zs/NbGOzRII0LJNU@jiegan-gv.ap.qualcomm.com> (raw)
In-Reply-To: <20240828151205.GA3830921-robh@kernel.org>

On Wed, Aug 28, 2024 at 10:12:05AM -0500, Rob Herring wrote:
> On Wed, Aug 28, 2024 at 09:27:04AM +0800, Jie Gan wrote:
> > Add binding file to specify how to define a Coresight TMC
> > Control Unit device in device tree.
> > 
> > It is responsible for controlling the data filter function
> > based on the source device's Trace ID for TMC ETR device.
> > The trace data with that Trace id can get into ETR's buffer
> > while other trace data gets ignored.
> > 
> > Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
> > ---
> >  .../bindings/arm/qcom,coresight-ctcu.yaml     | 84 +++++++++++++++++++
> >  1 file changed, 84 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> > new file mode 100644
> > index 000000000000..669aac646451
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> > @@ -0,0 +1,84 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: CoreSight TMC Control Unit
> > +
> > +maintainers:
> > +  - Yuanfang Zhang <quic_yuanfang@quicinc.com>
> > +  - Mao Jinlong <quic_jinlmao@quicinc.com>
> > +  - Jie Gan <quic_jiegan@quicinc.com>
> > +
> > +description:
> 
> You need '>' or '|' if you want to preserve paragraphs.

Sorry for the mistake, I did not observe it by self-checking.
I will add it in next version.

description: -> description: |

> 
> > +  The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
> > +  Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations.
> > +  The configuration mode (ETB, ETF, ETR) is discovered at boot time when
> > +  the device is probed.
> > +
> > +  The Coresight TMC Control unit controls various Coresight behaviors.
> > +  It works as a helper device when connected to TMC ETR device.
> > +  It is responsible for controlling the data filter function based on
> > +  the source device's Trace ID for TMC ETR device. The trace data with
> > +  that Trace id can get into ETR's buffer while other trace data gets
> > +  ignored.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - qcom,sa8775p-ctcu
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: apb
> > +
> > +  in-ports:
> 
> Just "ports". "in-ports" is for the case when you have "out-ports".

We had a discusstion about why use "in-ports" in v3.
https://lore.kernel.org/linux-arm-kernel/4b51d5a9-3706-4630-83c1-01b01354d9a4@arm.com/

The individual driver must "fix" before use "ports". The question is do we need to fix
the logic of the individual driver before submit this patch?

> > > -- 
> > 2.34.1
> > 

Thanks,
Jie

  reply	other threads:[~2024-08-29  1:23 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-28  1:27 [PATCH v4 0/5] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2024-08-28  1:27 ` [PATCH v4 1/5] Coresight: Add support for new APB clock name Jie Gan
2024-08-28  1:27 ` [PATCH v4 2/5] Coresight: Add trace_id function to retrieving the trace ID Jie Gan
2024-08-28 17:50   ` Markus Elfring
2024-08-28  1:27 ` [PATCH v4 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware Jie Gan
2024-08-28 15:12   ` Rob Herring
2024-08-29  1:22     ` JieGan [this message]
2024-08-28  1:27 ` [PATCH v4 4/5] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2024-08-28 17:52   ` Markus Elfring
2024-08-28  1:27 ` [PATCH v4 5/5] arm64: dts: qcom: Add CTCU and ETR nodes for SA8775p Jie Gan

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