Re: [PATCH 25/34] arm64: dts: qcom: sdm845: Move PCIe phy and GPIOs to root port node

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 9/10/26 3:29 PM, Krishna Chaitanya Chundru wrote:
> The PCIe phy reference and the perst/wake GPIO properties are
> per root port and belong in the root port node (pcie@0), not in the
> RC controller node. Move phys and phy-names from the controller to
> pcie0_port0 and pcie1_port0, adding labels to these nodes to allow
> board-level overrides. Move perst-gpios/wake-gpios from the
> controller overrides to the respective port nodes in the board files,
> renaming perst-gpios to reset-gpios to match the binding used in the
> root port context.
> 
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 13 +++++++++----
>  arch/arm64/boot/dts/qcom/sdm845-mtp.dts    | 12 ++++++++----
>  arch/arm64/boot/dts/qcom/sdm845.dtsi       | 14 ++++++--------
>  3 files changed, 23 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> index 3e636926231d..27a0b90d2b7a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> @@ -618,15 +618,17 @@ &mss_pil {
>  
>  &pcie0 {
>  	status = "okay";
> -	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
> -	wake-gpios = <&tlmm 134 GPIO_ACTIVE_LOW>;
> -
>  	vddpe-3v3-supply = <&pcie0_3p3v_dual>;
>  
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie0_default_state>;
>  };
>  
> +&pcie0_port0 {

p'h'y < p'o'rt, just noticed other patches have the same issue, please
touch it up

Konrad