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From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
To: "devnull+aleksa.paunovic.htecgroup.com@kernel.org"
	<devnull+aleksa.paunovic.htecgroup.com@kernel.org>
Cc: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>,
	"alex@ghiti.fr" <alex@ghiti.fr>,
	"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"conor.dooley@microchip.com" <conor.dooley@microchip.com>,
	"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Djordje Todorovic <Djordje.Todorovic@htecgroup.com>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"palmer@dabbelt.com" <palmer@dabbelt.com>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"robh@kernel.org" <robh@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>
Subject: Re: [PATCH v6 0/2] riscv: Use GCR.U timer device as clocksource
Date: Thu, 28 Aug 2025 10:24:54 +0000	[thread overview]
Message-ID: <a17a89a1-cdab-4082-8cf7-bb6ec456a51b@htecgroup.com> (raw)
In-Reply-To: <20250806-riscv-time-mmio-v6-0-2df0e8219998@htecgroup.com>

On 8/6/25 14:26, Aleksa Paunovic via B4 Relay wrote:

> This series adds bindings for the GCR.U timer device and corresponding
> driver support. Accessing the memory mapped mtime register in the GCR.U
> region should be faster than trapping to M mode each time the timer
> needs to be read.
>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>

Gentle ping.

If there are any further comments, we'd be happy to address them.

Best regards,
Aleksa

> ---
> Changes in v6:
> - Rename mti,gcru to mips,p8700-gcru
> - Link to v5: https://lore.kernel.org/r/20250711-riscv-time-mmio-v5-0-9ed1f825ad5e@htecgroup.com
>
> Changes in v5:
> - Fixed build issues on 32-bit RISC-V and sparse warnings
> - Remove clint_time_val and clint.h, replace with riscv_time_val
> - Depend on RISCV_TIMER in Kconfig
> Changes in v4:
> - Remove "select" from mti,gcru.yaml.
> - Refactor the driver to use function pointers instead of static keys.
>
> Previous versions:
> v1: https://lore.kernel.org/lkml/20241227150056.191794-1-arikalo@gmail.com/#t
> v2: https://lore.kernel.org/linux-riscv/20250409143816.15802-1-aleksa.paunovic@htecgroup.com/
> v3: https://lore.kernel.org/linux-riscv/DU0PR09MB61968695A2A3146EE83B7708F6BA2@DU0PR09MB6196.eurprd09.prod.outlook.com/
> v4: https://lore.kernel.org/r/20250514-riscv-time-mmio-v4-0-cb0cf2922d66@htecgroup.com
> v5: https://lore.kernel.org/r/20250711-riscv-time-mmio-v5-0-9ed1f825ad5e@htecgroup.com
>
> ---
> Aleksa Paunovic (2):
>       dt-bindings: timer: mips,p8700-gcru
>       riscv: Allow for riscv-clock to pick up mmio address.
>
>  .../devicetree/bindings/timer/mips,p8700-gcru.yaml | 38 +++++++++++++
>  arch/riscv/include/asm/clint.h                     | 26 ---------
>  arch/riscv/include/asm/timex.h                     | 63 ++++++++++++----------
>  drivers/clocksource/Kconfig                        | 12 +++++
>  drivers/clocksource/timer-clint.c                  | 20 ++++---
>  drivers/clocksource/timer-riscv.c                  | 34 ++++++++++++
>  6 files changed, 128 insertions(+), 65 deletions(-)
> ---
> base-commit: 038d61fd642278bab63ee8ef722c50d10ab01e8f
> change-id: 20250424-riscv-time-mmio-5628e0fca8af
>
> Best regards,
> --
> Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
>
>

      parent reply	other threads:[~2025-08-28 10:25 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-06 12:26 Aleksa Paunovic via B4 Relay
2025-08-06 12:26 ` [PATCH v6 1/2] dt-bindings: timer: mips,p8700-gcru Aleksa Paunovic via B4 Relay
2025-08-06 12:26 ` [PATCH v6 2/2] riscv: Allow for riscv-clock to pick up mmio address Aleksa Paunovic via B4 Relay
2025-08-28 10:24 ` Aleksa Paunovic [this message]

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