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From: Hans Zhang <18255117159@163.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: lpieralisi@kernel.org, bhelgaas@google.com,
	kwilczynski@kernel.org, robh@kernel.org, jingoohan1@gmail.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 00/13] PCI: dwc: Refactor register access with dw_pcie_clear_and_set_dword helper
Date: Thu, 26 Jun 2025 22:51:33 +0800	[thread overview]
Message-ID: <a2f02857-34b9-4abd-8315-9279f31f6e91@163.com> (raw)
In-Reply-To: <yw5ex3su7gjepctaqwkz3u5orcau55hibb2oozdlc2bkdopd3i@ftd34glarexm>



On 2025/6/26 05:00, Manivannan Sadhasivam wrote:
> On Wed, Jun 18, 2025 at 11:20:59PM +0800, Hans Zhang wrote:
>> Register bit manipulation in DesignWare PCIe controllers currently
>> uses repetitive read-modify-write sequences across multiple drivers.
>> This pattern leads to code duplication and increases maintenance
>> complexity as each driver implements similar logic with minor variations.
>>
>> This series introduces dw_pcie_clear_and_set_dword() to centralize atomic
>> register modification. The helper performs read-clear-set-write operations
>> in a single function, replacing open-coded implementations. Subsequent
>> patches refactor individual drivers to use this helper, eliminating
>> redundant code and ensuring consistent bit handling.
>>
>> The change reduces overall code size by ~350 lines while improving
>> maintainability. Each controller driver is updated in a separate
>> patch to preserve bisectability and simplify review.
>>
> 
> Thanks for the cleanup! I spotted a typo in patch 13/13. Apart from that, I only
> have one comment. You are initializing the temp variable like 'val' to 0 and
> then ORing it with some fields. Here the initialization part is not necessary.
> You could just write the first field directly instead of ORing with a 0
> initialized variable.
> 
> Rest LGTM!

Dear Mani,

Thank you very much for your reply and reminder.

Will fix.

Best regards,
Hans

> 
> - Mani
> 


      reply	other threads:[~2025-06-26 14:51 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-18 15:20 Hans Zhang
2025-06-18 15:21 ` [PATCH v2 01/13] PCI: dwc: Add dw_pcie_clear_and_set_dword() for register bit manipulation Hans Zhang
2025-06-19  4:29   ` Frank Li
2025-06-19  5:42     ` Hans Zhang
2025-06-19 15:12       ` Frank Li
2025-06-18 15:21 ` [PATCH v2 02/13] PCI: dwc: Refactor code by using dw_pcie_clear_and_set_dword() Hans Zhang
2025-06-18 15:21 ` [PATCH v2 03/13] PCI: dra7xx: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 04/13] PCI: imx6: " Hans Zhang
2025-06-19 15:16   ` Frank Li
2025-06-18 15:21 ` [PATCH v2 05/13] PCI: meson: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 06/13] PCI: armada8k: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 07/13] PCI: bt1: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 08/13] PCI: dw-rockchip: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 09/13] PCI: fu740: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 10/13] PCI: qcom: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 11/13] PCI: qcom-ep: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 12/13] PCI: rcar-gen4: " Hans Zhang
2025-06-18 15:21 ` [PATCH v2 13/13] PCI: tegra194: " Hans Zhang
2025-06-25 20:57   ` Manivannan Sadhasivam
2025-06-26 14:31     ` Hans Zhang
2025-06-25 21:00 ` [PATCH v2 00/13] PCI: dwc: Refactor register access with dw_pcie_clear_and_set_dword helper Manivannan Sadhasivam
2025-06-26 14:51   ` Hans Zhang [this message]

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