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From: Jon Hunter <jonathanh@nvidia.com>
To: Akhil R <akhilrajeev@nvidia.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Dmitry Osipenko <digetx@gmail.com>,
	Andi Shyti <andi.shyti@kernel.org>,
	Thierry Reding <thierry.reding@kernel.org>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Kartik Rajput <kkartik@nvidia.com>,
	linux-i2c@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] i2c: tegra: Use non-HS timings for clock divisor
Date: Tue, 10 Nov 2026 17:06:01 +0000	[thread overview]
Message-ID: <a3616176-ba50-45d2-a0d4-46fd5f6379c2@nvidia.com> (raw)
In-Reply-To: <20261110162300.3834584-1-akhilrajeev@nvidia.com>


On 10/11/2026 16:23, Akhil R wrote:
> Programming the HS timing registers overwrites the local tlow and thigh
> values before they are used to calculate the controller clock rate. On
> controllers with HS support, this mixes HS timings with the clock divisor
> calculation and sets an incorrect clock rate.
> 
> Calculate the clock multiplier before the HS register setup overwrites
> the selected non-HS timings.
> 
> Fixes: 978b3ccbbac3 ("i2c: tegra: Add HS mode support")
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-tegra.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 76d21bc51c618..6a98432734d37 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -976,6 +976,8 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
>  	if (i2c_dev->hw->has_interface_timing_reg && tsu_thd)
>  		i2c_writel(i2c_dev, tsu_thd, i2c_dev->hw->regs->interface_timing_1);
>  
> +	clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1);
> +
>  	/* Write HS mode registers. These will get used only for HS mode*/
>  	if (i2c_dev->hw->enable_hs_mode_support) {
>  		tlow = i2c_dev->hw->tlow_hs_mode;
> @@ -988,8 +990,6 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
>  		i2c_writel(i2c_dev, tsu_thd, i2c_dev->hw->regs->hs_interface_timing_1);
>  	}
>  
> -	clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1);
> -
>  	err = clk_set_rate(i2c_dev->div_clk,
>  			   t->bus_freq_hz * clk_multiplier);
>  	if (err) {
> 
> base-commit: 7649ba73f9e7e1e04d0b46213e39c79ae09dd55c


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon

-- 
nvpublic


      reply	other threads:[~2026-11-10 17:06 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10 16:23 Akhil R
2026-11-10 17:06 ` Jon Hunter [this message]

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