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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: george.moussalem@outlook.com,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Luo Jie <quic_luoj@quicinc.com>, Lee Jones <lee@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/6] clk: qcom: ipq5018: keep XO clock always on
Date: Fri, 9 May 2025 23:47:32 +0200	[thread overview]
Message-ID: <a3c3dbe8-b73e-40a4-b86f-ff9f371b1a46@oss.qualcomm.com> (raw)
In-Reply-To: <20250506-ipq5018-cmn-pll-v2-1-c0a9fcced114@outlook.com>

On 5/6/25 7:43 AM, George Moussalem via B4 Relay wrote:
> From: George Moussalem <george.moussalem@outlook.com>
> 
> The XO clock must not be disabled to avoid the kernel trying to disable
> the it (when parenting it under the CMN PLL reference clock), else the
> kernel will panic and the below message will appear in the kernel logs.
> So let's enable the XO and its source CLK and keep them always on.
> 
> [    0.916515] ------------[ cut here ]------------
> [    0.918890] gcc_xo_clk_src status stuck at 'on'
> [    0.918944] WARNING: CPU: 0 PID: 8 at drivers/clk/qcom/clk-branch.c:86 clk_branch_wait+0x114/0x124
> [    0.927926] Modules linked in:
> [    0.936945] CPU: 0 PID: 8 Comm: kworker/0:0 Not tainted 6.6.74 #0
> [    0.939982] Hardware name: Linksys MX2000 (DT)
> [    0.946151] Workqueue: pm pm_runtime_work
> [    0.950489] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> [    0.954566] pc : clk_branch_wait+0x114/0x124
> [    0.961335] lr : clk_branch_wait+0x114/0x124
> [    0.965849] sp : ffffffc08181bb50
> [    0.970101] x29: ffffffc08181bb50 x28: 0000000000000000 x27: 61c8864680b583eb
> [    0.973317] x26: ffffff801fec2168 x25: ffffff800000abc0 x24: 0000000000000002
> [    0.980437] x23: ffffffc0809f6fd8 x22: 0000000000000000 x21: ffffffc08044193c
> [    0.985276] loop: module loaded
> [    0.987554] x20: 0000000000000000 x19: ffffffc081749278 x18: 000000000000007c
> [    0.987573] x17: 0000000091706274 x16: 000000001985c4f7 x15: ffffffc0816bbdf0
> [    0.987587] x14: 0000000000000174 x13: 000000000000007c x12: 00000000ffffffea
> [    0.987601] x11: 00000000ffffefff x10: ffffffc081713df0 x9 : ffffffc0816bbd98
> [    0.987615] x8 : 0000000000017fe8 x7 : c0000000ffffefff x6 : 0000000000057fa8
> [    1.026268] x5 : 0000000000000fff x4 : 0000000000000000 x3 : ffffffc08181b950
> [    1.033385] x2 : ffffffc0816bbd30 x1 : ffffffc0816bbd30 x0 : 0000000000000023
> [    1.040507] Call trace:
> [    1.047618]  clk_branch_wait+0x114/0x124
> [    1.049875]  clk_branch2_disable+0x2c/0x3c
> [    1.054043]  clk_core_disable+0x60/0xac
> [    1.057948]  clk_core_disable+0x68/0xac
> [    1.061681]  clk_disable+0x30/0x4c
> [    1.065499]  pm_clk_suspend+0xd4/0xfc
> [    1.068971]  pm_generic_runtime_suspend+0x2c/0x44
> [    1.072705]  __rpm_callback+0x40/0x1bc
> [    1.077392]  rpm_callback+0x6c/0x78
> [    1.081038]  rpm_suspend+0xf0/0x5c0
> [    1.084423]  pm_runtime_work+0xf0/0xfc
> [    1.087895]  process_one_work+0x17c/0x2f8
> [    1.091716]  worker_thread+0x2e8/0x4d4
> [    1.095795]  kthread+0xdc/0xe0
> [    1.099440]  ret_from_fork+0x10/0x20
> [    1.102480] ---[ end trace 0000000000000000 ]---
> 
> Signed-off-by: George Moussalem <george.moussalem@outlook.com>
> ---

[...]

> +	/* Keep some clocks always-on */
> +	qcom_branch_set_clk_en(regmap, 0x30018); /* GCC_XO_CLK_SRC */

this clock is not a clk_branch2 - its control register is different and
this call is incorrect - you can drop it altogether, as if the XO source
clock isn't running, the system is dead

> +	qcom_branch_set_clk_en(regmap, 0x30030); /* GCC_XO_CLK */

This one actually is likely supposed to be always-on too - does removing
these two lines do any harm?

Konrad

  reply	other threads:[~2025-05-09 21:47 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06  5:43 [PATCH v2 0/6] Add CMN PLL clock controller support for IPQ5018 George Moussalem via B4 Relay
2025-05-06  5:43 ` [PATCH v2 1/6] clk: qcom: ipq5018: keep XO clock always on George Moussalem via B4 Relay
2025-05-09 21:47   ` Konrad Dybcio [this message]
2025-05-14  8:04     ` George Moussalem
2025-05-16  9:01       ` Konrad Dybcio
2025-05-06  5:43 ` [PATCH v2 2/6] dt-bindings: clock: qcom: ipq5018: remove bindings for XO clock George Moussalem via B4 Relay
2025-05-09 21:48   ` Konrad Dybcio
2025-05-14  8:11     ` George Moussalem
2025-05-06  5:43 ` [PATCH v2 3/6] dt-bindings: clock: qcom: Add CMN PLL support for IPQ5018 SoC George Moussalem via B4 Relay
2025-05-14 16:03   ` Rob Herring (Arm)
2025-05-06  5:43 ` [PATCH v2 4/6] clk: qcom: ipq-cmn-pll: Add IPQ5018 SoC support George Moussalem via B4 Relay
2025-05-06  5:43 ` [PATCH v2 5/6] arm64: dts: ipq5018: Add CMN PLL node George Moussalem via B4 Relay
2025-05-06  5:43 ` [PATCH v2 6/6] arm64: dts: qcom: Update IPQ5018 xo_board_clk to use fixed factor clock George Moussalem via B4 Relay

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