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From: Frieder Schrempf <frieder.schrempf@kontron.de>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
	robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org,
	agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, ping.bai@nxp.com,
	aford173@gmail.com, abel.vesa@nxp.com
Subject: Re: [PATCH 03/16] soc: imx: gpcv2: switch to clk_bulk_* API
Date: Mon, 3 May 2021 15:37:35 +0200	[thread overview]
Message-ID: <a3d75d88-421b-b10b-c16e-d46b77078a53@kontron.de> (raw)
In-Reply-To: <20210429073050.21039-4-peng.fan@oss.nxp.com>

On 29.04.21 09:30, Peng Fan (OSS) wrote:
> From: Lucas Stach <l.stach@pengutronix.de>
> 
> Use clk_bulk API to simplify the code a bit. Also add some error
> checking to the clk_prepare_enable calls.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>   drivers/soc/imx/gpcv2.c | 60 +++++++++--------------------------------
>   1 file changed, 12 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index 552d3e6bee52..1d90c7802972 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -100,13 +100,11 @@
>   
>   #define GPC_PGC_CTRL_PCR		BIT(0)
>   
> -#define GPC_CLK_MAX		6
> -
>   struct imx_pgc_domain {
>   	struct generic_pm_domain genpd;
>   	struct regmap *regmap;
>   	struct regulator *regulator;
> -	struct clk *clk[GPC_CLK_MAX];
> +	struct clk_bulk_data *clks;
>   	int num_clks;
>   
>   	unsigned int pgc;
> @@ -149,8 +147,12 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
>   	}
>   
>   	/* Enable reset clocks for all devices in the domain */
> -	for (i = 0; i < domain->num_clks; i++)
> -		clk_prepare_enable(domain->clk[i]);
> +	clk_bulk_prepare_enable(domain->num_clks, domain->clks);

Looks like this fails to catch the return value. This is fixed in patch 
04/13 but should happen here already. All the rest looks good to me.

> +	if (ret) {
> +		dev_err(domain->dev, "failed to enable reset clocks\n");
> +		regulator_disable(domain->regulator);
> +		return ret;
> +	}
>   
>   	if (enable_power_control)
>   		regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> @@ -187,8 +189,7 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
>   				   GPC_PGC_CTRL_PCR, 0);
>   
>   	/* Disable reset clocks for all devices in the domain */
> -	for (i = 0; i < domain->num_clks; i++)
> -		clk_disable_unprepare(domain->clk[i]);
> +	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
>   
>   	if (has_regulator && !on) {
>   		int err;
> @@ -438,41 +439,6 @@ static const struct imx_pgc_domain_data imx8m_pgc_domain_data = {
>   	.reg_access_table = &imx8m_access_table,
>   };
>   
> -static int imx_pgc_get_clocks(struct imx_pgc_domain *domain)
> -{
> -	int i, ret;
> -
> -	for (i = 0; ; i++) {
> -		struct clk *clk = of_clk_get(domain->dev->of_node, i);
> -		if (IS_ERR(clk))
> -			break;
> -		if (i >= GPC_CLK_MAX) {
> -			dev_err(domain->dev, "more than %d clocks\n",
> -				GPC_CLK_MAX);
> -			ret = -EINVAL;
> -			goto clk_err;
> -		}
> -		domain->clk[i] = clk;
> -	}
> -	domain->num_clks = i;
> -
> -	return 0;
> -
> -clk_err:
> -	while (i--)
> -		clk_put(domain->clk[i]);
> -
> -	return ret;
> -}
> -
> -static void imx_pgc_put_clocks(struct imx_pgc_domain *domain)
> -{
> -	int i;
> -
> -	for (i = domain->num_clks - 1; i >= 0; i--)
> -		clk_put(domain->clk[i]);
> -}
> -
>   static int imx_pgc_domain_probe(struct platform_device *pdev)
>   {
>   	struct imx_pgc_domain *domain = pdev->dev.platform_data;
> @@ -490,9 +456,10 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)
>   				      domain->voltage, domain->voltage);
>   	}
>   
> -	ret = imx_pgc_get_clocks(domain);
> -	if (ret)
> -		return dev_err_probe(domain->dev, ret, "Failed to get domain's clocks\n");
> +	domain->num_clks = devm_clk_bulk_get_all(domain->dev, &domain->clks);
> +	if (domain->num_clks < 0)
> +		return dev_err_probe(domain->dev, domain->num_clks,
> +				     "Failed to get domain's clocks\n");
>   
>   	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
>   			   domain->bits.map, domain->bits.map);
> @@ -517,7 +484,6 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)
>   out_domain_unmap:
>   	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
>   			   domain->bits.map, 0);
> -	imx_pgc_put_clocks(domain);
>   
>   	return ret;
>   }
> @@ -532,8 +498,6 @@ static int imx_pgc_domain_remove(struct platform_device *pdev)
>   	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
>   			   domain->bits.map, 0);
>   
> -	imx_pgc_put_clocks(domain);
> -
>   	return 0;
>   }
>   
> 

  reply	other threads:[~2021-05-03 13:37 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-29  7:30 [PATCH 00/16] soc: imx: gpcv2: support i.MX8MM Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 01/16] soc: imx: gpcv2: move to more ideomatic error handling in probe Peng Fan (OSS)
2021-05-03 13:26   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 02/16] soc: imx: gpcv2: move domain mapping to domain driver probe Peng Fan (OSS)
2021-05-03 13:27   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 03/16] soc: imx: gpcv2: switch to clk_bulk_* API Peng Fan (OSS)
2021-05-03 13:37   ` Frieder Schrempf [this message]
2021-04-29  7:30 ` [PATCH 04/16] soc: imx: gpcv2: split power up and power down sequence control Peng Fan (OSS)
2021-05-03 14:13   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 05/16] soc: imx: gpcv2: wait for ADB400 handshake Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 06/16] soc: imx: gpcv2: add runtime PM support for power-domains Peng Fan (OSS)
2021-05-03 14:18   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 07/16] soc: imx: gpcv2: allow domains without power-sequence control Peng Fan (OSS)
2021-05-03 14:21   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 08/16] dt-bindings: imx: gpcv2: add support for optional resets Peng Fan (OSS)
2021-05-03 14:27   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 09/16] soc: " Peng Fan (OSS)
2021-05-03 14:30   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 10/16] dt-bindings: power: add defines for i.MX8MM power domains Peng Fan (OSS)
2021-05-03 19:37   ` Rob Herring
2021-04-29  7:30 ` [PATCH 11/16] soc: imx: gpcv2: add support " Peng Fan (OSS)
2021-05-03 14:37   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 12/16] soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX " Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 13/16] soc: imx: gpcv2: correct pm_runtime_get_sync usage Peng Fan (OSS)
2021-04-29 14:25   ` Lucas Stach
2021-04-30  4:43     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 14/16] soc: imx: gpcv2: move reset assert after requesting domain power up Peng Fan (OSS)
2021-04-29 14:28   ` Lucas Stach
2021-04-30  4:51     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 15/16] soc: imx: gpcv2: support reset defer probe Peng Fan (OSS)
2021-04-29  8:39   ` Ahmad Fatoum
2021-04-29 14:30   ` Lucas Stach
2021-04-30  4:51     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 16/16] soc: imx: gpcv2: remove waiting handshake in power up Peng Fan (OSS)
2021-04-29 14:34   ` Lucas Stach
2021-04-30  4:52     ` Peng Fan (OSS)
2021-04-30  7:14     ` Peng Fan (OSS)
2021-04-30  8:47       ` Lucas Stach
2021-04-29 12:39 ` [PATCH 00/16] soc: imx: gpcv2: support i.MX8MM Adam Ford
2021-04-30  1:33   ` Peng Fan
2021-04-30  3:05     ` Adam Ford

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