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From: Frieder Schrempf <frieder.schrempf@kontron.de>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
	robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org,
	agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, ping.bai@nxp.com,
	aford173@gmail.com, abel.vesa@nxp.com
Subject: Re: [PATCH 07/16] soc: imx: gpcv2: allow domains without power-sequence control
Date: Mon, 3 May 2021 16:21:39 +0200	[thread overview]
Message-ID: <f384f461-fac4-5423-619f-e35a4abea7f5@kontron.de> (raw)
In-Reply-To: <20210429073050.21039-8-peng.fan@oss.nxp.com>

On 29.04.21 09:30, Peng Fan (OSS) wrote:
> From: Lucas Stach <l.stach@pengutronix.de>
> 
> Some of the PGC domains only control the handshake with the ADB400
> and don't have any power sequence controls. Make such domains work
> by allowing the pxx and map bits to be empty and skip all actions
> using those controls.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>

> ---
>   drivers/soc/imx/gpcv2.c | 89 +++++++++++++++++++++++------------------
>   1 file changed, 49 insertions(+), 40 deletions(-)
> 
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index 87165619a689..640f4165cfba 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -163,24 +163,27 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
>   		goto out_regulator_disable;
>   	}
>   
> -	/* request the domain to power up */
> -	regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
> -			   domain->bits.pxx, domain->bits.pxx);
> -	/*
> -	 * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> -	 * for PUP_REQ/PDN_REQ bit to be cleared
> -	 */
> -	ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
> -				       reg_val, !(reg_val & domain->bits.pxx),
> -				       0, USEC_PER_MSEC);
> -	if (ret) {
> -		dev_err(domain->dev, "failed to command PGC\n");
> -		goto out_clk_disable;
> -	}
> +	if (domain->bits.pxx) {
> +		/* request the domain to power up */
> +		regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
> +				   domain->bits.pxx, domain->bits.pxx);
> +		/*
> +		 * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> +		 * for PUP_REQ/PDN_REQ bit to be cleared
> +		 */
> +		ret = regmap_read_poll_timeout(domain->regmap,
> +					       GPC_PU_PGC_SW_PUP_REQ, reg_val,
> +					       !(reg_val & domain->bits.pxx),
> +					       0, USEC_PER_MSEC);
> +		if (ret) {
> +			dev_err(domain->dev, "failed to command PGC\n");
> +			goto out_clk_disable;
> +		}
>   
> -	/* disable power control */
> -	regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> -			   GPC_PGC_CTRL_PCR, 0);
> +		/* disable power control */
> +		regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> +				   GPC_PGC_CTRL_PCR, 0);
> +	}
>   
>   	/* request the ADB400 to power up */
>   	if (domain->bits.hskreq) {
> @@ -241,23 +244,26 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd)
>   		}
>   	}
>   
> -	/* enable power control */
> -	regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> -			   GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
> -
> -	/* request the domain to power down */
> -	regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ,
> -			   domain->bits.pxx, domain->bits.pxx);
> -	/*
> -	 * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> -	 * for PUP_REQ/PDN_REQ bit to be cleared
> -	 */
> -	ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PDN_REQ,
> -				       reg_val, !(reg_val & domain->bits.pxx),
> -				       0, USEC_PER_MSEC);
> -	if (ret) {
> -		dev_err(domain->dev, "failed to command PGC\n");
> -		goto out_clk_disable;
> +	if (domain->bits.pxx) {
> +		/* enable power control */
> +		regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
> +				   GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
> +
> +		/* request the domain to power down */
> +		regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ,
> +				   domain->bits.pxx, domain->bits.pxx);
> +		/*
> +		 * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
> +		 * for PUP_REQ/PDN_REQ bit to be cleared
> +		 */
> +		ret = regmap_read_poll_timeout(domain->regmap,
> +					       GPC_PU_PGC_SW_PDN_REQ, reg_val,
> +					       !(reg_val & domain->bits.pxx),
> +					       0, USEC_PER_MSEC);
> +		if (ret) {
> +			dev_err(domain->dev, "failed to command PGC\n");
> +			goto out_clk_disable;
> +		}
>   	}
>   
>   	/* Disable reset clocks for all devices in the domain */
> @@ -532,8 +538,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)
>   
>   	pm_runtime_enable(domain->dev);
>   
> -	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> -			   domain->bits.map, domain->bits.map);
> +	if (domain->bits.map)
> +		regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> +				   domain->bits.map, domain->bits.map);
>   
>   	ret = pm_genpd_init(&domain->genpd, NULL, true);
>   	if (ret) {
> @@ -553,8 +560,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)
>   out_genpd_remove:
>   	pm_genpd_remove(&domain->genpd);
>   out_domain_unmap:
> -	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> -			   domain->bits.map, 0);
> +	if (domain->bits.map)
> +		regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> +				   domain->bits.map, 0);
>   	pm_runtime_disable(domain->dev);
>   
>   	return ret;
> @@ -567,8 +575,9 @@ static int imx_pgc_domain_remove(struct platform_device *pdev)
>   	of_genpd_del_provider(domain->dev->of_node);
>   	pm_genpd_remove(&domain->genpd);
>   
> -	regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> -			   domain->bits.map, 0);
> +	if (domain->bits.map)
> +		regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
> +				   domain->bits.map, 0);
>   
>   	pm_runtime_disable(domain->dev);
>   
> 

  reply	other threads:[~2021-05-03 14:21 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-29  7:30 [PATCH 00/16] soc: imx: gpcv2: support i.MX8MM Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 01/16] soc: imx: gpcv2: move to more ideomatic error handling in probe Peng Fan (OSS)
2021-05-03 13:26   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 02/16] soc: imx: gpcv2: move domain mapping to domain driver probe Peng Fan (OSS)
2021-05-03 13:27   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 03/16] soc: imx: gpcv2: switch to clk_bulk_* API Peng Fan (OSS)
2021-05-03 13:37   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 04/16] soc: imx: gpcv2: split power up and power down sequence control Peng Fan (OSS)
2021-05-03 14:13   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 05/16] soc: imx: gpcv2: wait for ADB400 handshake Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 06/16] soc: imx: gpcv2: add runtime PM support for power-domains Peng Fan (OSS)
2021-05-03 14:18   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 07/16] soc: imx: gpcv2: allow domains without power-sequence control Peng Fan (OSS)
2021-05-03 14:21   ` Frieder Schrempf [this message]
2021-04-29  7:30 ` [PATCH 08/16] dt-bindings: imx: gpcv2: add support for optional resets Peng Fan (OSS)
2021-05-03 14:27   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 09/16] soc: " Peng Fan (OSS)
2021-05-03 14:30   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 10/16] dt-bindings: power: add defines for i.MX8MM power domains Peng Fan (OSS)
2021-05-03 19:37   ` Rob Herring
2021-04-29  7:30 ` [PATCH 11/16] soc: imx: gpcv2: add support " Peng Fan (OSS)
2021-05-03 14:37   ` Frieder Schrempf
2021-04-29  7:30 ` [PATCH 12/16] soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX " Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 13/16] soc: imx: gpcv2: correct pm_runtime_get_sync usage Peng Fan (OSS)
2021-04-29 14:25   ` Lucas Stach
2021-04-30  4:43     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 14/16] soc: imx: gpcv2: move reset assert after requesting domain power up Peng Fan (OSS)
2021-04-29 14:28   ` Lucas Stach
2021-04-30  4:51     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 15/16] soc: imx: gpcv2: support reset defer probe Peng Fan (OSS)
2021-04-29  8:39   ` Ahmad Fatoum
2021-04-29 14:30   ` Lucas Stach
2021-04-30  4:51     ` Peng Fan (OSS)
2021-04-29  7:30 ` [PATCH 16/16] soc: imx: gpcv2: remove waiting handshake in power up Peng Fan (OSS)
2021-04-29 14:34   ` Lucas Stach
2021-04-30  4:52     ` Peng Fan (OSS)
2021-04-30  7:14     ` Peng Fan (OSS)
2021-04-30  8:47       ` Lucas Stach
2021-04-29 12:39 ` [PATCH 00/16] soc: imx: gpcv2: support i.MX8MM Adam Ford
2021-04-30  1:33   ` Peng Fan
2021-04-30  3:05     ` Adam Ford

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