From: "Arınç ÜNAL" <arinc.unal@arinc9.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Sean Wang <sean.wang@mediatek.com>,
Landen Chao <Landen.Chao@mediatek.com>,
DENG Qingfang <dqfext@gmail.com>,
Daniel Golle <daniel@makrotopia.org>,
Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Russell King <linux@armlinux.org.uk>,
Richard van Schagen <richard@routerhints.com>,
Richard van Schagen <vschagen@cs.com>,
Frank Wunderlich <frank-w@public-files.de>,
Bartel Eerdekens <bartel.eerdekens@constell8.be>,
erkin.bozoglu@xeront.com, mithat.guner@xeront.com,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH net-next 05/30] net: dsa: mt7530: read XTAL value from correct register
Date: Sun, 4 Jun 2023 19:22:53 +0300 [thread overview]
Message-ID: <a60be212-7b81-20ea-8af4-eee70ac3ecd8@arinc9.com> (raw)
In-Reply-To: <20230604071122.kb3xenjbptm6jebh@skbuf>
On 4.06.2023 10:11, Vladimir Oltean wrote:
> On Sun, Jun 04, 2023 at 09:34:38AM +0300, Arınç ÜNAL wrote:
>>> I disagree as a matter of principle with the reasoning. The fact that
>>> XTAL constants are defined under HWTRAP is not a reason to change the
>>> code to read the XTAL values from the HWTRAP register. The fact that
>>> XTAL_FSEL is read-only in MHWTRAP is indeed a reason why you *could*
>>> read it from HWTRAP, but also not one why you *should* make a change.
>>
>> Makes sense. I have refactored the hardware trap constants definitions
>> by looking at the documents for MT7530 and MT7531. The registers are the
>> same on both switches so I combine the bits under MT753X_(M)HWTRAP.
>>
>> I put the r/w bits on MHWTRAP to MWHTRAP, the read-only bits on HWTRAP
>> and MHWTRAP to HWTRAP. Mind that the MT7531_CHG_STRAP bit exists only on
>> the MHWTRAP register.
>>
>> To follow this, I read XTAL for MT7530 from HWTRAP instead of MHWTRAP
>> since the XTAL bits are read-only. Would this change make sense as a
>> matter of refactoring?
>
> Possibly. The maintainers of mt7530 have the definitive word on that.
> Behavior changes (reading XTAL from HWTRAP instead of MHWTRAP) should
> still have their separate change which isn't noisy, separate from the
> renaming of constants.
>
>> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
>> index 5b77799f41cc..444fa97db7c0 100644
>> --- a/drivers/net/dsa/mt7530.c
>> +++ b/drivers/net/dsa/mt7530.c
>> @@ -420,9 +420,9 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface)
>> struct mt7530_priv *priv = ds->priv;
>> u32 ncpo1, ssc_delta, i, xtal;
>> - mt7530_clear(priv, MT7530_MHWTRAP, MHWTRAP_P6_DIS);
>> + mt7530_clear(priv, MT753X_MHWTRAP, MT7530_P6_DIS);
>> - xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK;
>> + xtal = mt7530_read(priv, MT753X_HWTRAP) & MT7530_XTAL_MASK;
>> if (interface == PHY_INTERFACE_MODE_RGMII) {
>> mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK,
>> @@ -431,21 +431,21 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface)
>> mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK,
>> P6_INTF_MODE(1));
>> - if (xtal == HWTRAP_XTAL_25MHZ)
>> + if (xtal == MT7530_XTAL_25MHZ)
>> ssc_delta = 0x57;
>> else
>> ssc_delta = 0x87;
>> if (priv->id == ID_MT7621) {
>> /* PLL frequency: 125MHz: 1.0GBit */
>> - if (xtal == HWTRAP_XTAL_40MHZ)
>> + if (xtal == MT7530_XTAL_40MHZ)
>> ncpo1 = 0x0640;
>> - if (xtal == HWTRAP_XTAL_25MHZ)
>> + if (xtal == MT7530_XTAL_25MHZ)
>> ncpo1 = 0x0a00;
>> } else { /* PLL frequency: 250MHz: 2.0Gbit */
>> - if (xtal == HWTRAP_XTAL_40MHZ)
>> + if (xtal == MT7530_XTAL_40MHZ)
>> ncpo1 = 0x0c80;
>> - if (xtal == HWTRAP_XTAL_25MHZ)
>> + if (xtal == MT7530_XTAL_25MHZ)
>> ncpo1 = 0x1400;
>> }
>> @@ -487,12 +487,12 @@ mt7531_pll_setup(struct mt7530_priv *priv)
>> val = mt7530_read(priv, MT7531_CREV);
>> top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
>> - hwstrap = mt7530_read(priv, MT7531_HWTRAP);
>> + hwstrap = mt7530_read(priv, MT753X_HWTRAP);
>> if ((val & CHIP_REV_M) > 0)
>> - xtal = (top_sig & PAD_MCM_SMI_EN) ? HWTRAP_XTAL_FSEL_40MHZ :
>> - HWTRAP_XTAL_FSEL_25MHZ;
>> + xtal = (top_sig & PAD_MCM_SMI_EN) ? MT7531_XTAL_FSEL_40MHZ :
>> + MT7531_XTAL_FSEL_25MHZ;
>> else
>> - xtal = hwstrap & HWTRAP_XTAL_FSEL_MASK;
>> + xtal = hwstrap & MT7531_XTAL25;
>
> xtal = hwstrap & BIT(7). The "xtal" variable will either hold the value
> of 0 or BIT(7), do you agree?
Yes I suppose the correct code should be:
xtal = (hwstrap & MT7531_XTAL25) ? MT7531_XTAL_FSEL_25MHZ :
MT7531_XTAL_FSEL_40MHZ;
>
>> /* Step 1 : Disable MT7531 COREPLL */
>> val = mt7530_read(priv, MT7531_PLLGP_EN);
>> @@ -521,13 +521,13 @@ mt7531_pll_setup(struct mt7530_priv *priv)
>> usleep_range(25, 35);
>> switch (xtal) {
>> - case HWTRAP_XTAL_FSEL_25MHZ:
>> + case MT7531_XTAL_FSEL_25MHZ:
>
> reworded:
> case 1:
>
> when will "xtal" be equal to 1?
This should work correctly with my comment above.
Arınç
next prev parent reply other threads:[~2023-06-04 16:25 UTC|newest]
Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-22 12:15 [PATCH net-next 00/30] net: dsa: mt7530: improve, trap BPDU & LLDP, and prefer CPU port arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 01/30] net: dsa: mt7530: add missing @p5_interface to mt7530_priv description arinc9.unal
2023-05-23 23:29 ` Andrew Lunn
2023-05-22 12:15 ` [PATCH net-next 02/30] net: dsa: mt7530: use p5_interface_select as data type for p5_intf_sel arinc9.unal
2023-05-23 23:31 ` Andrew Lunn
2023-05-24 7:41 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 03/30] net: dsa: mt7530: properly support MT7531AE and MT7531BE arinc9.unal
2023-05-24 14:48 ` Vladimir Oltean
2023-05-25 6:00 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 04/30] net: dsa: mt7530: improve comments regarding port 5 and 6 arinc9.unal
2023-05-23 23:35 ` Andrew Lunn
2023-05-24 14:49 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 05/30] net: dsa: mt7530: read XTAL value from correct register arinc9.unal
2023-05-23 23:37 ` Andrew Lunn
2023-05-24 16:57 ` Vladimir Oltean
2023-05-25 6:20 ` Arınç ÜNAL
2023-05-25 13:31 ` Vladimir Oltean
2023-06-04 6:34 ` Arınç ÜNAL
2023-06-04 7:11 ` Vladimir Oltean
2023-06-04 16:22 ` Arınç ÜNAL [this message]
2023-05-22 12:15 ` [PATCH net-next 06/30] net: dsa: mt7530: improve code path for setting up port 5 arinc9.unal
2023-05-24 17:35 ` Vladimir Oltean
2023-05-25 6:42 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 07/30] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled arinc9.unal
2023-05-24 17:45 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 08/30] net: dsa: mt7530: change p{5,6}_interface to p{5,6}_configured arinc9.unal
2023-05-24 17:51 ` Vladimir Oltean
2023-05-25 6:49 ` Arınç ÜNAL
2023-05-26 13:01 ` Vladimir Oltean
2023-06-03 12:15 ` Arınç ÜNAL
2023-06-03 12:26 ` Russell King (Oracle)
2023-06-04 10:46 ` Arınç ÜNAL
2023-06-04 12:18 ` Russell King (Oracle)
2023-06-04 12:55 ` Vladimir Oltean
2023-06-04 13:07 ` Russell King (Oracle)
2023-06-04 13:14 ` Arınç ÜNAL
2023-06-04 13:25 ` Vladimir Oltean
2023-06-04 15:13 ` Russell King (Oracle)
2023-06-04 16:00 ` Russell King (Oracle)
2023-06-04 16:06 ` Russell King (Oracle)
2023-06-04 16:14 ` Arınç ÜNAL
2023-06-10 10:57 ` Arınç ÜNAL
2023-06-10 17:55 ` Vladimir Oltean
2023-06-11 7:23 ` Arınç ÜNAL
2024-01-10 11:15 ` Arınç ÜNAL
2024-01-10 14:27 ` Vladimir Oltean
2024-01-10 17:15 ` Arınç ÜNAL
2024-01-10 18:05 ` Vladimir Oltean
2024-01-10 18:31 ` Russell King (Oracle)
2024-01-11 9:19 ` Vladimir Oltean
2023-06-05 14:36 ` Arınç ÜNAL
2023-06-03 12:27 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 09/30] net: dsa: mt7530: empty default case on mt7530_setup_port5() arinc9.unal
2023-05-24 18:04 ` Vladimir Oltean
2023-05-24 18:05 ` Vladimir Oltean
2023-05-25 6:51 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 10/30] net: dsa: mt7530: call port 6 setup from mt7530_mac_config() arinc9.unal
2023-05-24 18:08 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 11/30] net: dsa: mt7530: remove pad_setup function pointer arinc9.unal
2023-05-24 18:09 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 12/30] net: dsa: mt7530: move XTAL check to mt7530_setup() arinc9.unal
2023-05-23 23:40 ` Andrew Lunn
2023-05-24 18:15 ` Vladimir Oltean
2023-05-25 7:04 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 13/30] net: dsa: mt7530: move enabling port 6 to mt7530_setup_port6() arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 14/30] net: dsa: mt7530: switch to if/else statements on mt7530_setup_port6() arinc9.unal
2023-05-26 13:08 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 15/30] net: dsa: mt7530: set TRGMII RD TAP if trgmii is being used arinc9.unal
2023-05-26 13:09 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 16/30] net: dsa: mt7530: move lowering port 5 RGMII driving to mt7530_setup() arinc9.unal
2023-05-26 13:17 ` Vladimir Oltean
2023-06-04 7:05 ` Arınç ÜNAL
2023-06-04 7:14 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 17/30] net: dsa: mt7530: fix port capabilities for MT7988 arinc9.unal
2023-05-26 13:20 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 18/30] net: dsa: mt7530: remove .mac_port_config for MT7988 and make it optional arinc9.unal
2023-05-26 13:21 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 19/30] net: dsa: mt7530: set interrupt register only for MT7530 arinc9.unal
2023-05-26 13:25 ` Vladimir Oltean
2023-06-04 7:18 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 20/30] net: dsa: mt7530: properly reset MT7531 switch arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 21/30] net: dsa: mt7530: get rid of useless error returns on phylink code path arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 22/30] net: dsa: mt7530: rename p5_intf_sel and use only for MT7530 switch arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 23/30] net: dsa: mt7530: run mt7530_pll_setup() only with 40 MHz XTAL arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 24/30] net: dsa: mt7530: rename MT7530_MFC to MT753X_MFC arinc9.unal
2023-05-26 15:42 ` Vladimir Oltean
2023-05-26 15:50 ` Russell King (Oracle)
2023-06-04 8:06 ` Arınç ÜNAL
2023-06-04 13:17 ` Vladimir Oltean
2023-06-04 13:25 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 25/30] net: dsa: mt7530: properly set MT7531_CPU_PMAP arinc9.unal
2023-05-26 15:51 ` Vladimir Oltean
2023-06-04 8:21 ` Arınç ÜNAL
2023-06-04 13:08 ` Vladimir Oltean
2023-06-04 13:33 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 26/30] net: dsa: mt7530: properly set MT7530_CPU_PORT arinc9.unal
2023-05-26 16:55 ` Vladimir Oltean
2023-06-04 8:33 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 27/30] net: dsa: mt7530: introduce BPDU trapping for MT7530 switch arinc9.unal
2023-05-26 17:02 ` Vladimir Oltean
2023-06-04 8:51 ` Arınç ÜNAL
2023-06-04 9:23 ` Vladimir Oltean
2023-06-04 9:39 ` Arınç ÜNAL
2023-06-04 12:47 ` Vladimir Oltean
2023-06-10 8:32 ` Arınç ÜNAL
2023-06-10 17:57 ` Vladimir Oltean
2023-05-22 12:15 ` [PATCH net-next 28/30] net: dsa: mt7530: introduce LLDP frame trapping arinc9.unal
2023-05-22 12:15 ` [PATCH net-next 29/30] net: dsa: introduce preferred_default_local_cpu_port and use on MT7530 arinc9.unal
2023-05-26 17:17 ` Vladimir Oltean
2023-06-04 10:02 ` Arınç ÜNAL
2023-05-22 12:15 ` [PATCH net-next 30/30] MAINTAINERS: add me as maintainer of MEDIATEK SWITCH DRIVER arinc9.unal
2023-05-24 14:37 ` Vladimir Oltean
2023-05-26 17:38 ` Vladimir Oltean
2023-05-22 12:25 ` [PATCH net-next 00/30] net: dsa: mt7530: improve, trap BPDU & LLDP, and prefer CPU port Andrew Lunn
2023-05-22 13:37 ` Arınç ÜNAL
2023-05-22 15:43 ` Vladimir Oltean
2023-05-22 14:09 ` Horatiu Vultur
2023-05-22 14:35 ` Arınç ÜNAL
2023-05-22 18:13 ` Russell King (Oracle)
2023-05-23 1:54 ` Jakub Kicinski
2023-05-26 17:47 ` Vladimir Oltean
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