* [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2
@ 2025-03-14 8:21 Luca Weiss
2025-03-15 13:37 ` Konrad Dybcio
2025-03-17 2:55 ` Bjorn Andersson
0 siblings, 2 replies; 3+ messages in thread
From: Luca Weiss @ 2025-03-14 8:21 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
On SM8650 the CPUs 0-1 are "silver" (Cortex-A520), CPU 2-6 are "gold"
(Cortex-A720) and CPU 7 is "gold-plus" (Cortex-X4).
So reference the correct "gold" idle-state for CPU core 2.
Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 719ad437756a499cee4170abccc83f2047f0f747..5844d7d0d0e6b31c08de3391f5cae3f8d823b2cd 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -1449,7 +1449,7 @@ cpu_pd1: power-domain-cpu1 {
cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd>;
- domain-idle-states = <&silver_cpu_sleep_0>;
+ domain-idle-states = <&gold_cpu_sleep_0>;
};
cpu_pd3: power-domain-cpu3 {
---
base-commit: eea255893718268e1ab852fb52f70c613d109b99
change-id: 20250314-sm8650-cpu2-sleep-058cbe384f7e
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2
2025-03-14 8:21 [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2 Luca Weiss
@ 2025-03-15 13:37 ` Konrad Dybcio
2025-03-17 2:55 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Konrad Dybcio @ 2025-03-15 13:37 UTC (permalink / raw)
To: Luca Weiss, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Neil Armstrong
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
On 3/14/25 9:21 AM, Luca Weiss wrote:
> On SM8650 the CPUs 0-1 are "silver" (Cortex-A520), CPU 2-6 are "gold"
> (Cortex-A720) and CPU 7 is "gold-plus" (Cortex-X4).
>
> So reference the correct "gold" idle-state for CPU core 2.
>
> Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2
2025-03-14 8:21 [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2 Luca Weiss
2025-03-15 13:37 ` Konrad Dybcio
@ 2025-03-17 2:55 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2025-03-17 2:55 UTC (permalink / raw)
To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Neil Armstrong, Luca Weiss
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
On Fri, 14 Mar 2025 09:21:16 +0100, Luca Weiss wrote:
> On SM8650 the CPUs 0-1 are "silver" (Cortex-A520), CPU 2-6 are "gold"
> (Cortex-A720) and CPU 7 is "gold-plus" (Cortex-X4).
>
> So reference the correct "gold" idle-state for CPU core 2.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2
commit: 9bb5ca464100e7c8f2d740148088f60e04fed8ed
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-03-17 2:56 UTC | newest]
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2025-03-14 8:21 [PATCH] arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2 Luca Weiss
2025-03-15 13:37 ` Konrad Dybcio
2025-03-17 2:55 ` Bjorn Andersson
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