[PATCH 0/4] Add RZ/G3L GFX support

[PATCH 0/4] Add RZ/G3L GFX support

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

The Renesas RZ/G3L SoC includes the Arm Mali-G31 GPU as a 3D Graphics
Engine (GE3D). The Arm Mali-G31 GPU is a graphics acceleration platform
that is based on open standards. It supports 2D graphics, 3D graphics, and
General Purpose computing on GPU (GPGPU). Add the binding and driver
support for suspend/resume functionality along with some improvements in
panfrost driver.

Biju Das (4):
  dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3L SoC
  drm/panfrost: Drop redundant optional clock checks in runtime PM
  drm/panfrost: Add bus_ace optional clock support for RZ/G2L
  drm/panfrost: Add GPU_PM_RT support for RZ/G3L SoC

 .../bindings/gpu/arm,mali-bifrost.yaml        |  2 ++
 drivers/gpu/drm/panfrost/panfrost_device.c    | 36 ++++++++++++++-----
 drivers/gpu/drm/panfrost/panfrost_device.h    |  1 +
 drivers/gpu/drm/panfrost/panfrost_drv.c       |  1 +
 4 files changed, 32 insertions(+), 8 deletions(-)

-- 
2.43.0

[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3L SoC

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

Add a compatible string for the Renesas RZ/G3L SoC variants that include a
Mali-G31 GPU. These variants share the same restrictions on interrupts,
clocks, and power domains as the RZ/G2L SoC, so extend the existing schema
validation accordingly.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index db49b8ff8c74..9db9f84ad964 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -26,6 +26,7 @@ properties:
               - realtek,rtd1619-mali
               - renesas,r9a07g044-mali
               - renesas,r9a07g054-mali
+              - renesas,r9a08g046-mali
               - renesas,r9a09g047-mali
               - renesas,r9a09g056-mali
               - renesas,r9a09g057-mali
@@ -150,6 +151,7 @@ allOf:
             enum:
               - renesas,r9a07g044-mali
               - renesas,r9a07g054-mali
+              - renesas,r9a08g046-mali
               - renesas,r9a09g047-mali
               - renesas,r9a09g056-mali
               - renesas,r9a09g057-mali
-- 
2.43.0

[PATCH 2/4] drm/panfrost: Drop redundant optional clock checks in runtime PM

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

The clk_enable() and clk_disable() APIs already handle NULL clock pointers
gracefully — clk_enable() returns 0 and clk_disable() returns immediately
when passed a NULL or optional clock. The explicit if (pfdev->bus_clock)
guards around these calls in the runtime suspend/resume paths are
therefore unnecessary. Remove them to simplify the code.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/gpu/drm/panfrost/panfrost_device.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
index dedc13e56631..01e702a0b2f0 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.c
+++ b/drivers/gpu/drm/panfrost/panfrost_device.c
@@ -429,11 +429,9 @@ static int panfrost_device_runtime_resume(struct device *dev)
 		if (ret)
 			goto err_clk;
 
-		if (pfdev->bus_clock) {
-			ret = clk_enable(pfdev->bus_clock);
-			if (ret)
-				goto err_bus_clk;
-		}
+		ret = clk_enable(pfdev->bus_clock);
+		if (ret)
+			goto err_bus_clk;
 	}
 
 	panfrost_device_reset(pfdev, true);
@@ -464,9 +462,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
 	panfrost_gpu_power_off(pfdev);
 
 	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
-		if (pfdev->bus_clock)
-			clk_disable(pfdev->bus_clock);
-
+		clk_disable(pfdev->bus_clock);
 		clk_disable(pfdev->clock);
 		reset_control_assert(pfdev->rstc);
 	}
-- 
2.43.0

[PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
Without it, unbind/bind cycles leave the GPU non-operational, manifesting
as an AS_ACTIVE bit stuck and a soft reset timeout falling back to hard
reset. Add bus_ace_clock as an optional clock, wiring it into init/fini,
and the runtime suspend/resume paths alongside the existing optional
bus_clock.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/gpu/drm/panfrost/panfrost_device.c | 24 ++++++++++++++++++++++
 drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
index 01e702a0b2f0..87dae0ed748a 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.c
+++ b/drivers/gpu/drm/panfrost/panfrost_device.c
@@ -70,8 +70,23 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
 			goto disable_clock;
 	}
 
+	pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
+	if (IS_ERR(pfdev->bus_ace_clock)) {
+		err = PTR_ERR(pfdev->bus_ace_clock);
+		dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
+			PTR_ERR(pfdev->bus_ace_clock));
+		err = PTR_ERR(pfdev->bus_ace_clock);
+		goto disable_bus_clock;
+	}
+
+	err = clk_prepare_enable(pfdev->bus_ace_clock);
+	if (err)
+		goto disable_bus_clock;
+
 	return 0;
 
+disable_bus_clock:
+	clk_disable_unprepare(pfdev->bus_clock);
 disable_clock:
 	clk_disable_unprepare(pfdev->clock);
 
@@ -80,6 +95,7 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
 
 static void panfrost_clk_fini(struct panfrost_device *pfdev)
 {
+	clk_disable_unprepare(pfdev->bus_ace_clock);
 	clk_disable_unprepare(pfdev->bus_clock);
 	clk_disable_unprepare(pfdev->clock);
 }
@@ -432,6 +448,10 @@ static int panfrost_device_runtime_resume(struct device *dev)
 		ret = clk_enable(pfdev->bus_clock);
 		if (ret)
 			goto err_bus_clk;
+
+		ret = clk_enable(pfdev->bus_ace_clock);
+		if (ret)
+			goto err_bus_ace_clk;
 	}
 
 	panfrost_device_reset(pfdev, true);
@@ -439,6 +459,9 @@ static int panfrost_device_runtime_resume(struct device *dev)
 
 	return 0;
 
+err_bus_ace_clk:
+	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
+		clk_disable(pfdev->bus_clock);
 err_bus_clk:
 	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
 		clk_disable(pfdev->clock);
@@ -462,6 +485,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
 	panfrost_gpu_power_off(pfdev);
 
 	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
+		clk_disable(pfdev->bus_ace_clock);
 		clk_disable(pfdev->bus_clock);
 		clk_disable(pfdev->clock);
 		reset_control_assert(pfdev->rstc);
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
index 0f3992412205..ec55c136b1b6 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.h
+++ b/drivers/gpu/drm/panfrost/panfrost_device.h
@@ -136,6 +136,7 @@ struct panfrost_device {
 	void __iomem *iomem;
 	struct clk *clock;
 	struct clk *bus_clock;
+	struct clk *bus_ace_clock;
 	struct regulator_bulk_data *regulators;
 	struct reset_control *rstc;
 	/* pm_domains for devices with more than one. */
-- 
2.43.0

[PATCH 4/4] drm/panfrost: Add GPU_PM_RT support for RZ/G3L SoC

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

RZ/G3L SoC is embedded with Mali-G31 GPU system. Add GPU_PM_RT support as
it needs to be assert/deassert the reset during suspend/resume.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/gpu/drm/panfrost/panfrost_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 711f5101aa04..3d0bdba2a474 100644
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -1156,6 +1156,7 @@ static const struct of_device_id dt_match[] = {
 	  .data = &amlogic_data, },
 	{ .compatible = "amlogic,meson-g12a-mali",
 	  .data = &amlogic_data, },
+	{ .compatible = "renesas,r9a08g046-mali", .data = &default_pm_rt_data },
 	{ .compatible = "renesas,r9a09g047-mali", .data = &default_pm_rt_data },
 	{ .compatible = "arm,mali-t604", .data = &default_data, },
 	{ .compatible = "arm,mali-t624", .data = &default_data, },
-- 
2.43.0

Re: [PATCH 1/4] dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3L SoC

[Rob Herring (Arm)]

On Wed, 04 Mar 2026 13:48:36 +0000, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Add a compatible string for the Renesas RZ/G3L SoC variants that include a
> Mali-G31 GPU. These variants share the same restrictions on interrupts,
> clocks, and power domains as the RZ/G2L SoC, so extend the existing schema
> validation accordingly.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

RE: [PATCH 0/4] Add RZ/G3L GFX support

[Biju Das]

Hi All,

> -----Original Message-----
> From: Biju <biju.das.au@gmail.com>
> Sent: 04 March 2026 13:49
> Subject: [PATCH 0/4] Add RZ/G3L GFX support
> 
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> The Renesas RZ/G3L SoC includes the Arm Mali-G31 GPU as a 3D Graphics Engine (GE3D). The Arm Mali-G31
> GPU is a graphics acceleration platform that is based on open standards. It supports 2D graphics, 3D
> graphics, and General Purpose computing on GPU (GPGPU). Add the binding and driver support for
> suspend/resume functionality along with some improvements in panfrost driver.
> 
> Biju Das (4):
>   dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3L SoC
>   drm/panfrost: Drop redundant optional clock checks in runtime PM
>   drm/panfrost: Add bus_ace optional clock support for RZ/G2L
>   drm/panfrost: Add GPU_PM_RT support for RZ/G3L SoC
> 
>  .../bindings/gpu/arm,mali-bifrost.yaml        |  2 ++
>  drivers/gpu/drm/panfrost/panfrost_device.c    | 36 ++++++++++++++-----
>  drivers/gpu/drm/panfrost/panfrost_device.h    |  1 +
>  drivers/gpu/drm/panfrost/panfrost_drv.c       |  1 +
>  4 files changed, 32 insertions(+), 8 deletions(-)
> 
> --
> 2.43.0

Gentle ping.

Cheers,
Biju

Re: [PATCH 2/4] drm/panfrost: Drop redundant optional clock checks in runtime PM

[Steven Price]

On 04/03/2026 13:48, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> The clk_enable() and clk_disable() APIs already handle NULL clock pointers
> gracefully — clk_enable() returns 0 and clk_disable() returns immediately
> when passed a NULL or optional clock. The explicit if (pfdev->bus_clock)
> guards around these calls in the runtime suspend/resume paths are
> therefore unnecessary. Remove them to simplify the code.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Steven Price <steven.price@arm.com>

> ---
>  drivers/gpu/drm/panfrost/panfrost_device.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index dedc13e56631..01e702a0b2f0 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -429,11 +429,9 @@ static int panfrost_device_runtime_resume(struct device *dev)
>  		if (ret)
>  			goto err_clk;
>  
> -		if (pfdev->bus_clock) {
> -			ret = clk_enable(pfdev->bus_clock);
> -			if (ret)
> -				goto err_bus_clk;
> -		}
> +		ret = clk_enable(pfdev->bus_clock);
> +		if (ret)
> +			goto err_bus_clk;
>  	}
>  
>  	panfrost_device_reset(pfdev, true);
> @@ -464,9 +462,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
>  	panfrost_gpu_power_off(pfdev);
>  
>  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
> -		if (pfdev->bus_clock)
> -			clk_disable(pfdev->bus_clock);
> -
> +		clk_disable(pfdev->bus_clock);
>  		clk_disable(pfdev->clock);
>  		reset_control_assert(pfdev->rstc);
>  	}

Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L

[Steven Price]

On 04/03/2026 13:48, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
> Without it, unbind/bind cycles leave the GPU non-operational, manifesting
> as an AS_ACTIVE bit stuck and a soft reset timeout falling back to hard
> reset. Add bus_ace_clock as an optional clock, wiring it into init/fini,
> and the runtime suspend/resume paths alongside the existing optional
> bus_clock.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  drivers/gpu/drm/panfrost/panfrost_device.c | 24 ++++++++++++++++++++++
>  drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
>  2 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index 01e702a0b2f0..87dae0ed748a 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -70,8 +70,23 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
>  			goto disable_clock;
>  	}
>  
> +	pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
> +	if (IS_ERR(pfdev->bus_ace_clock)) {
> +		err = PTR_ERR(pfdev->bus_ace_clock);
> +		dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
> +			PTR_ERR(pfdev->bus_ace_clock));
> +		err = PTR_ERR(pfdev->bus_ace_clock);

You've assigned err twice (with the same value), and you can simplify
the dev_err() line by using err rather than the same PTR_ERR()
expression again.

With that fixed:

Reviewed-by: Steven Price <steven.price@arm.com>

Thanks,
Steve

> +		goto disable_bus_clock;
> +	}
> +
> +	err = clk_prepare_enable(pfdev->bus_ace_clock);
> +	if (err)
> +		goto disable_bus_clock;
> +
>  	return 0;
>  
> +disable_bus_clock:
> +	clk_disable_unprepare(pfdev->bus_clock);
>  disable_clock:
>  	clk_disable_unprepare(pfdev->clock);
>  
> @@ -80,6 +95,7 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
>  
>  static void panfrost_clk_fini(struct panfrost_device *pfdev)
>  {
> +	clk_disable_unprepare(pfdev->bus_ace_clock);
>  	clk_disable_unprepare(pfdev->bus_clock);
>  	clk_disable_unprepare(pfdev->clock);
>  }
> @@ -432,6 +448,10 @@ static int panfrost_device_runtime_resume(struct device *dev)
>  		ret = clk_enable(pfdev->bus_clock);
>  		if (ret)
>  			goto err_bus_clk;
> +
> +		ret = clk_enable(pfdev->bus_ace_clock);
> +		if (ret)
> +			goto err_bus_ace_clk;
>  	}
>  
>  	panfrost_device_reset(pfdev, true);
> @@ -439,6 +459,9 @@ static int panfrost_device_runtime_resume(struct device *dev)
>  
>  	return 0;
>  
> +err_bus_ace_clk:
> +	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
> +		clk_disable(pfdev->bus_clock);
>  err_bus_clk:
>  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
>  		clk_disable(pfdev->clock);
> @@ -462,6 +485,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
>  	panfrost_gpu_power_off(pfdev);
>  
>  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
> +		clk_disable(pfdev->bus_ace_clock);
>  		clk_disable(pfdev->bus_clock);
>  		clk_disable(pfdev->clock);
>  		reset_control_assert(pfdev->rstc);
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
> index 0f3992412205..ec55c136b1b6 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> @@ -136,6 +136,7 @@ struct panfrost_device {
>  	void __iomem *iomem;
>  	struct clk *clock;
>  	struct clk *bus_clock;
> +	struct clk *bus_ace_clock;
>  	struct regulator_bulk_data *regulators;
>  	struct reset_control *rstc;
>  	/* pm_domains for devices with more than one. */

Re: [PATCH 4/4] drm/panfrost: Add GPU_PM_RT support for RZ/G3L SoC

[Steven Price]

On 04/03/2026 13:48, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> RZ/G3L SoC is embedded with Mali-G31 GPU system. Add GPU_PM_RT support as
> it needs to be assert/deassert the reset during suspend/resume.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Steven Price <steven.price@arm.com>

> ---
>  drivers/gpu/drm/panfrost/panfrost_drv.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
> index 711f5101aa04..3d0bdba2a474 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_drv.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
> @@ -1156,6 +1156,7 @@ static const struct of_device_id dt_match[] = {
>  	  .data = &amlogic_data, },
>  	{ .compatible = "amlogic,meson-g12a-mali",
>  	  .data = &amlogic_data, },
> +	{ .compatible = "renesas,r9a08g046-mali", .data = &default_pm_rt_data },
>  	{ .compatible = "renesas,r9a09g047-mali", .data = &default_pm_rt_data },
>  	{ .compatible = "arm,mali-t604", .data = &default_data, },
>  	{ .compatible = "arm,mali-t624", .data = &default_data, },

RE: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L

[Biju Das]

Hi Steven Price,

Thanks for the feedback.

> -----Original Message-----
> From: Steven Price <steven.price@arm.com>
> Sent: 20 March 2026 12:16
> Subject: Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L
> 
> On 04/03/2026 13:48, Biju wrote:
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
> > Without it, unbind/bind cycles leave the GPU non-operational,
> > manifesting as an AS_ACTIVE bit stuck and a soft reset timeout falling
> > back to hard reset. Add bus_ace_clock as an optional clock, wiring it
> > into init/fini, and the runtime suspend/resume paths alongside the
> > existing optional bus_clock.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >  drivers/gpu/drm/panfrost/panfrost_device.c | 24
> > ++++++++++++++++++++++  drivers/gpu/drm/panfrost/panfrost_device.h |
> > 1 +
> >  2 files changed, 25 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c
> > b/drivers/gpu/drm/panfrost/panfrost_device.c
> > index 01e702a0b2f0..87dae0ed748a 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> > @@ -70,8 +70,23 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
> >  			goto disable_clock;
> >  	}
> >
> > +	pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
> > +	if (IS_ERR(pfdev->bus_ace_clock)) {
> > +		err = PTR_ERR(pfdev->bus_ace_clock);
> > +		dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
> > +			PTR_ERR(pfdev->bus_ace_clock));
> > +		err = PTR_ERR(pfdev->bus_ace_clock);
> 
> You've assigned err twice (with the same value), and you can simplify the dev_err() line by using err

Oops, forgot to take out the bottom assignment.

> rather than the same PTR_ERR() expression again.

I get a warning, if I use "err" in dev_err()

panfrost_device.c:76:42: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]
   76 |                 dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",


Cheers,
Biju

> 
> With that fixed:
> 
> Reviewed-by: Steven Price <steven.price@arm.com>
> 
> Thanks,
> Steve
> 
> > +		goto disable_bus_clock;
> > +	}
> > +
> > +	err = clk_prepare_enable(pfdev->bus_ace_clock);
> > +	if (err)
> > +		goto disable_bus_clock;
> > +
> >  	return 0;
> >
> > +disable_bus_clock:
> > +	clk_disable_unprepare(pfdev->bus_clock);
> >  disable_clock:
> >  	clk_disable_unprepare(pfdev->clock);
> >
> > @@ -80,6 +95,7 @@ static int panfrost_clk_init(struct panfrost_device
> > *pfdev)
> >
> >  static void panfrost_clk_fini(struct panfrost_device *pfdev)  {
> > +	clk_disable_unprepare(pfdev->bus_ace_clock);
> >  	clk_disable_unprepare(pfdev->bus_clock);
> >  	clk_disable_unprepare(pfdev->clock);
> >  }
> > @@ -432,6 +448,10 @@ static int panfrost_device_runtime_resume(struct device *dev)
> >  		ret = clk_enable(pfdev->bus_clock);
> >  		if (ret)
> >  			goto err_bus_clk;
> > +
> > +		ret = clk_enable(pfdev->bus_ace_clock);
> > +		if (ret)
> > +			goto err_bus_ace_clk;
> >  	}
> >
> >  	panfrost_device_reset(pfdev, true);
> > @@ -439,6 +459,9 @@ static int panfrost_device_runtime_resume(struct
> > device *dev)
> >
> >  	return 0;
> >
> > +err_bus_ace_clk:
> > +	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
> > +		clk_disable(pfdev->bus_clock);
> >  err_bus_clk:
> >  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
> >  		clk_disable(pfdev->clock);
> > @@ -462,6 +485,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
> >  	panfrost_gpu_power_off(pfdev);
> >
> >  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
> > +		clk_disable(pfdev->bus_ace_clock);
> >  		clk_disable(pfdev->bus_clock);
> >  		clk_disable(pfdev->clock);
> >  		reset_control_assert(pfdev->rstc);
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h
> > b/drivers/gpu/drm/panfrost/panfrost_device.h
> > index 0f3992412205..ec55c136b1b6 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_device.h
> > +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
> > @@ -136,6 +136,7 @@ struct panfrost_device {
> >  	void __iomem *iomem;
> >  	struct clk *clock;
> >  	struct clk *bus_clock;
> > +	struct clk *bus_ace_clock;
> >  	struct regulator_bulk_data *regulators;
> >  	struct reset_control *rstc;
> >  	/* pm_domains for devices with more than one. */

Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L

[Steven Price]

On 20/03/2026 12:30, Biju Das wrote:
> Hi Steven Price,
> 
> Thanks for the feedback.
> 
>> -----Original Message-----
>> From: Steven Price <steven.price@arm.com>
>> Sent: 20 March 2026 12:16
>> Subject: Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L
>>
>> On 04/03/2026 13:48, Biju wrote:
>>> From: Biju Das <biju.das.jz@bp.renesas.com>
>>>
>>> On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
>>> Without it, unbind/bind cycles leave the GPU non-operational,
>>> manifesting as an AS_ACTIVE bit stuck and a soft reset timeout falling
>>> back to hard reset. Add bus_ace_clock as an optional clock, wiring it
>>> into init/fini, and the runtime suspend/resume paths alongside the
>>> existing optional bus_clock.
>>>
>>> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>>> ---
>>>  drivers/gpu/drm/panfrost/panfrost_device.c | 24
>>> ++++++++++++++++++++++  drivers/gpu/drm/panfrost/panfrost_device.h |
>>> 1 +
>>>  2 files changed, 25 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c
>>> b/drivers/gpu/drm/panfrost/panfrost_device.c
>>> index 01e702a0b2f0..87dae0ed748a 100644
>>> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
>>> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
>>> @@ -70,8 +70,23 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
>>>  			goto disable_clock;
>>>  	}
>>>
>>> +	pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
>>> +	if (IS_ERR(pfdev->bus_ace_clock)) {
>>> +		err = PTR_ERR(pfdev->bus_ace_clock);
>>> +		dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
>>> +			PTR_ERR(pfdev->bus_ace_clock));
>>> +		err = PTR_ERR(pfdev->bus_ace_clock);
>>
>> You've assigned err twice (with the same value), and you can simplify the dev_err() line by using err
> 
> Oops, forgot to take out the bottom assignment.
> 
>> rather than the same PTR_ERR() expression again.
> 
> I get a warning, if I use "err" in dev_err()
> 
> panfrost_device.c:76:42: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]
>    76 |                 dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",

You can simply change the format string to "%d".

Explanation:

PTR_ERR returns a long (which matches the kernel's idea that a long is
the same size as a pointer). But the standard return code size is int.
So technically the assignment to err is truncating the type. However,
the IS_ERR() check uses MAX_ERRNO which is 4095 so all error values will
fit in an int. So we know the assignment into 'int' isn't going to
truncate. [ Also it's just an error message... ;) ]

Thanks,
Steve

> 
> Cheers,
> Biju
> 
>>
>> With that fixed:
>>
>> Reviewed-by: Steven Price <steven.price@arm.com>
>>
>> Thanks,
>> Steve
>>
>>> +		goto disable_bus_clock;
>>> +	}
>>> +
>>> +	err = clk_prepare_enable(pfdev->bus_ace_clock);
>>> +	if (err)
>>> +		goto disable_bus_clock;
>>> +
>>>  	return 0;
>>>
>>> +disable_bus_clock:
>>> +	clk_disable_unprepare(pfdev->bus_clock);
>>>  disable_clock:
>>>  	clk_disable_unprepare(pfdev->clock);
>>>
>>> @@ -80,6 +95,7 @@ static int panfrost_clk_init(struct panfrost_device
>>> *pfdev)
>>>
>>>  static void panfrost_clk_fini(struct panfrost_device *pfdev)  {
>>> +	clk_disable_unprepare(pfdev->bus_ace_clock);
>>>  	clk_disable_unprepare(pfdev->bus_clock);
>>>  	clk_disable_unprepare(pfdev->clock);
>>>  }
>>> @@ -432,6 +448,10 @@ static int panfrost_device_runtime_resume(struct device *dev)
>>>  		ret = clk_enable(pfdev->bus_clock);
>>>  		if (ret)
>>>  			goto err_bus_clk;
>>> +
>>> +		ret = clk_enable(pfdev->bus_ace_clock);
>>> +		if (ret)
>>> +			goto err_bus_ace_clk;
>>>  	}
>>>
>>>  	panfrost_device_reset(pfdev, true);
>>> @@ -439,6 +459,9 @@ static int panfrost_device_runtime_resume(struct
>>> device *dev)
>>>
>>>  	return 0;
>>>
>>> +err_bus_ace_clk:
>>> +	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
>>> +		clk_disable(pfdev->bus_clock);
>>>  err_bus_clk:
>>>  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
>>>  		clk_disable(pfdev->clock);
>>> @@ -462,6 +485,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
>>>  	panfrost_gpu_power_off(pfdev);
>>>
>>>  	if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
>>> +		clk_disable(pfdev->bus_ace_clock);
>>>  		clk_disable(pfdev->bus_clock);
>>>  		clk_disable(pfdev->clock);
>>>  		reset_control_assert(pfdev->rstc);
>>> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h
>>> b/drivers/gpu/drm/panfrost/panfrost_device.h
>>> index 0f3992412205..ec55c136b1b6 100644
>>> --- a/drivers/gpu/drm/panfrost/panfrost_device.h
>>> +++ b/drivers/gpu/drm/panfrost/panfrost_device.h
>>> @@ -136,6 +136,7 @@ struct panfrost_device {
>>>  	void __iomem *iomem;
>>>  	struct clk *clock;
>>>  	struct clk *bus_clock;
>>> +	struct clk *bus_ace_clock;
>>>  	struct regulator_bulk_data *regulators;
>>>  	struct reset_control *rstc;
>>>  	/* pm_domains for devices with more than one. */
> 

RE: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L

[Biju Das]

Hi Steven Price,

Thanks for the feedback.

> -----Original Message-----
> From: Steven Price <steven.price@arm.com>
> Sent: 20 March 2026 12:39
> Subject: Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock support for RZ/G2L
> 
> On 20/03/2026 12:30, Biju Das wrote:
> > Hi Steven Price,
> >
> > Thanks for the feedback.
> >
> >> -----Original Message-----
> >> From: Steven Price <steven.price@arm.com>
> >> Sent: 20 March 2026 12:16
> >> Subject: Re: [PATCH 3/4] drm/panfrost: Add bus_ace optional clock
> >> support for RZ/G2L
> >>
> >> On 04/03/2026 13:48, Biju wrote:
> >>> From: Biju Das <biju.das.jz@bp.renesas.com>
> >>>
> >>> On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
> >>> Without it, unbind/bind cycles leave the GPU non-operational,
> >>> manifesting as an AS_ACTIVE bit stuck and a soft reset timeout
> >>> falling back to hard reset. Add bus_ace_clock as an optional clock,
> >>> wiring it into init/fini, and the runtime suspend/resume paths
> >>> alongside the existing optional bus_clock.
> >>>
> >>> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> >>> ---
> >>>  drivers/gpu/drm/panfrost/panfrost_device.c | 24
> >>> ++++++++++++++++++++++  drivers/gpu/drm/panfrost/panfrost_device.h |
> >>> 1 +
> >>>  2 files changed, 25 insertions(+)
> >>>
> >>> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c
> >>> b/drivers/gpu/drm/panfrost/panfrost_device.c
> >>> index 01e702a0b2f0..87dae0ed748a 100644
> >>> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> >>> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> >>> @@ -70,8 +70,23 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
> >>>  			goto disable_clock;
> >>>  	}
> >>>
> >>> +	pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
> >>> +	if (IS_ERR(pfdev->bus_ace_clock)) {
> >>> +		err = PTR_ERR(pfdev->bus_ace_clock);
> >>> +		dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
> >>> +			PTR_ERR(pfdev->bus_ace_clock));
> >>> +		err = PTR_ERR(pfdev->bus_ace_clock);
> >>
> >> You've assigned err twice (with the same value), and you can simplify
> >> the dev_err() line by using err
> >
> > Oops, forgot to take out the bottom assignment.
> >
> >> rather than the same PTR_ERR() expression again.
> >
> > I get a warning, if I use "err" in dev_err()
> >
> > panfrost_device.c:76:42: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3
> has type ‘int’ [-Wformat=]
> >    76 |                 dev_err(pfdev->base.dev, "get bus_ace_clock failed %ld\n",
> 
> You can simply change the format string to "%d".
> 
> Explanation:
> 
> PTR_ERR returns a long (which matches the kernel's idea that a long is the same size as a pointer).
> But the standard return code size is int.
> So technically the assignment to err is truncating the type. However, the IS_ERR() check uses
> MAX_ERRNO which is 4095 so all error values will fit in an int. So we know the assignment into 'int'
> isn't going to truncate. [ Also it's just an error message... ;) ]

OK will fix this in next version.

Cheers,
Biju