From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Luo Jie <quic_luoj@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Georgi Djakov <djakov@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Richard Cochran <richardcochran@gmail.com>,
Konrad Dybcio <konradybcio@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Anusha Rao <quic_anusha@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, quic_kkumarcs@quicinc.com,
quic_linchen@quicinc.com, quic_leiwei@quicinc.com,
quic_suruchia@quicinc.com, quic_pavir@quicinc.com
Subject: Re: [PATCH v2 7/8] arm64: dts: qcom: ipq5424: Add NSS clock controller node
Date: Tue, 1 Jul 2025 14:10:35 +0200 [thread overview]
Message-ID: <a873f197-1ad6-4a7a-ba66-5fef10f32c57@oss.qualcomm.com> (raw)
In-Reply-To: <db1d07f4-f87d-403a-9ab3-bf8e5b9465b3@quicinc.com>
On 01-Jul-25 14:08, Luo Jie wrote:
>
>
> On 6/28/2025 12:27 AM, Konrad Dybcio wrote:
>> On 6/27/25 2:09 PM, Luo Jie wrote:
>>> NSS clock controller provides the clocks and resets to the networking
>>> hardware blocks on the IPQ5424, such as PPE (Packet Process Engine) and
>>> UNIPHY (PCS) blocks.
>>>
>>> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/ipq5424.dtsi | 30 ++++++++++++++++++++++++++++++
>>> 1 file changed, 30 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>>> index 2eea8a078595..eb4aa778269c 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>>> @@ -730,6 +730,36 @@ frame@f42d000 {
>>> };
>>> };
>>> + clock-controller@39b00000 {
>>> + compatible = "qcom,ipq5424-nsscc";
>>> + reg = <0 0x39b00000 0 0x800>;
>>
>> size = 0x100_000
>>
>> with that:
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>
>> Konrad
>
> I initially thought that a block size of 0x800 would be sufficient, as
> it covers the maximum address range needed for the clock configurations.
> However, the NSS clock controller block actually occupies an address
> range of 0x80000. I will update this to 0x80000 in the next version.
> Thank you for your feedback.
0x80_000 excludes the wrapper region. Please mark it as the entire
0x100_000 that it occupies, no matter if there's anything in there
Konrad
next prev parent reply other threads:[~2025-07-01 12:10 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-27 12:09 [PATCH v2 0/8] Add Network Subsystem (NSS) clock controller support for IPQ5424 SoC Luo Jie
2025-06-27 12:09 ` [PATCH v2 1/8] dt-bindings: interconnect: Add Qualcomm IPQ5424 NSSNOC IDs Luo Jie
2025-07-01 8:21 ` Krzysztof Kozlowski
2025-06-27 12:09 ` [PATCH v2 2/8] clk: qcom: ipq5424: Enable NSS NoC clocks to use icc-clk Luo Jie
2025-06-27 12:09 ` [PATCH v2 3/8] dt-bindings: clock: gcc-ipq5424: Add definition for GPLL0_OUT_AUX Luo Jie
2025-06-27 12:09 ` [PATCH v2 4/8] clock: qcom: gcc-ipq5424: Add gpll0_out_aux clock Luo Jie
2025-06-27 12:09 ` [PATCH v2 5/8] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC Luo Jie
2025-07-01 8:22 ` Krzysztof Kozlowski
2025-07-02 10:33 ` Luo Jie
2025-06-27 12:09 ` [PATCH v2 6/8] clk: qcom: Add NSS clock controller driver for IPQ5424 Luo Jie
2025-06-27 16:25 ` Konrad Dybcio
2025-06-27 12:09 ` [PATCH v2 7/8] arm64: dts: qcom: ipq5424: Add NSS clock controller node Luo Jie
2025-06-27 16:27 ` Konrad Dybcio
2025-07-01 12:08 ` Luo Jie
2025-07-01 12:10 ` Konrad Dybcio [this message]
2025-07-01 12:36 ` Luo Jie
2025-06-27 12:09 ` [PATCH v2 8/8] arm64: defconfig: Build NSS clock controller driver for IPQ5424 Luo Jie
2025-07-01 8:24 ` Krzysztof Kozlowski
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