Re: [PATCH v2] x86/mce: Do away with unnecessary context quirks

["Luck, Tony" <tony.luck@intel.com>]

On Thu, Aug 14, 2025 at 11:48:09AM -0400, Yazen Ghannam wrote:
> -/*
> - * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and
> - * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM
> - * Vol 3B Table 15-20). But this confuses both the code that determines
> - * whether the machine check occurred in kernel or user mode, and also
> - * the severity assessment code. Pretend that EIPV was set, and take the
> - * ip/cs values from the pt_regs that mce_gather_info() ignored earlier.
> - */
> -static __always_inline void
> -quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
> -{
> -	if (bank != 0)
> -		return;
> -	if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0)
> -		return;
> -	if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC|
> -		          MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV|
> -			  MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR|
> -			  MCACOD)) !=
> -			 (MCI_STATUS_UC|MCI_STATUS_EN|
> -			  MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S|
> -			  MCI_STATUS_AR|MCACOD_INSTR))
> -		return;
> -
> -	m->mcgstatus |= MCG_STATUS_EIPV;

I don't think this part of the Sandybridge quirk is covered in your
new code. Without EIPV set, the Intel severity table driven code will
fail to note this as recoverable.

-Tony