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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Cunyuan Liu <cunyuan.liu@cixtech.com>,
	boris.brezillon@collabora.com,  steven.price@arm.com,
	liviu.dudau@arm.com, robh@kernel.org, krzk+dt@kernel.org,
		conor+dt@kernel.org, gary.yang@cixtech.com,
	fugang.duan@cixtech.com
Cc: daniel.almeida@collabora.com, aliceryhl@google.com,
	 dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,  rust-for-linux@vger.kernel.org,
	cix-kernel-upstream@cixtech.com,  robin.wang@cixtech.com
Subject: Re: [PATCH 2/3] drm/panthor: Add initial support for CIX Sky1
Date: Fri, 06 Nov 2026 13:04:36 +0100	[thread overview]
Message-ID: <aa7385b6f373cd6467b772bf0a9941618b35c5ba.camel@pengutronix.de> (raw)
In-Reply-To: <20261106104735.1651267-3-cunyuan.liu@cixtech.com>

On Fr, 2026-11-06 at 18:47 +0800, Cunyuan Liu wrote:
> Add Sky1 SoC data to support the external reset and system-level cache
> settings, and to skip devfreq.
> 
> The GPU on CIX Sky1 needs an external reset before the driver first
> accesses the hardware. Without this reset, the GPU hardware cannot be
> accessed correctly.
> 
> Configure SYSC_ALLOC before L2 power-on. Without these settings, GPU
> rendering results are displayed incorrectly.
> 
> Keep the clock settings provided by the PM firmware. This first version
> does not read OPPs or enable devfreq. It does not register a GPU cooling
> device.
> 
> Tested on Orion O6: offscreen pixel readback, kmscube, glmark2 at 1080p,
> runtime suspend and resume with a retained EGL context, software-triggered
> reset-worker tests, and module unload and reload. Display tests used
> local Komeda support.
> 
> Signed-off-by: Cunyuan Liu <cunyuan.liu@cixtech.com>
> ---
>  drivers/gpu/drm/panthor/panthor_devfreq.c  | 11 +++++++++-
>  drivers/gpu/drm/panthor/panthor_device.c   | 15 +++++++++++++
>  drivers/gpu/drm/panthor/panthor_device.h   | 25 ++++++++++++++++++++++
>  drivers/gpu/drm/panthor/panthor_drv.c      | 15 +++++++++++++
>  drivers/gpu/drm/panthor/panthor_gpu.c      | 14 ++++++++++++
>  drivers/gpu/drm/panthor/panthor_gpu_regs.h |  2 ++
>  6 files changed, 81 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.c b/drivers/gpu/drm/panthor/panthor_devfreq.c
> index 2249b41ca4af..1914549f7b1f 100644
> --- a/drivers/gpu/drm/panthor/panthor_devfreq.c
> +++ b/drivers/gpu/drm/panthor/panthor_devfreq.c
[...]
> diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/panthor/panthor_device.c
> index 9687c59de350..1d682731a181 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.c
> +++ b/drivers/gpu/drm/panthor/panthor_device.c
> @@ -229,6 +229,13 @@ int panthor_device_init(struct panthor_device *ptdev)
>  		return ret;
>  	}
>  
> +	if (ptdev->soc_data && ptdev->soc_data->needs_external_reset) {
> +		ptdev->reset_control = devm_reset_control_get_exclusive(ptdev->base.dev, NULL);

You can just use devm_reset_control_get_optional_exclusive()
unconditionally.
Device tree validation makes sure the required reset will be specified.

> +		if (IS_ERR(ptdev->reset_control))
> +			return dev_err_probe(ptdev->base.dev, PTR_ERR(ptdev->reset_control),
> +					     "Failed to get GPU reset\n");
> +	}
> +
>  	ret = panthor_devfreq_init(ptdev);
>  	if (ret)
>  		return ret;
> @@ -511,6 +518,12 @@ int panthor_device_resume(struct device *dev)
>  	if (ret)
>  		goto err_disable_stacks_clk;
>  
> +	if (ptdev->reset_control && !panthor_device_is_initialized(ptdev)) {
> +		ret = reset_control_reset(ptdev->reset_control);

reset_control_reset() already checks that ptdev->reset_control != NULL,
so the first check is superfluous.


[...]
> diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
> index b55a3f9edd41..0923cc5df042 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.h
> +++ b/drivers/gpu/drm/panthor/panthor_device.h
[...]
> @@ -34,10 +36,30 @@ struct panthor_pwr;
>  struct panthor_vm;
>  struct panthor_vm_pool;
>  
> +/**
> + * struct panthor_sysc_config - GPU system-cache configuration
> + */
> +struct panthor_sysc_config {
> +	/** @alloc: System-cache allocation policies for GPU access types. */
> +	u32 alloc[8];
> +};
> +
>  /**
>   * struct panthor_soc_data - Panthor SoC Data
>   */
>  struct panthor_soc_data {
> +	/**
> +	 * @needs_external_reset: Reset the GPU after enabling its clocks
> +	 * during initial probe.
> +	 */
> +	bool needs_external_reset;

Not needed.

[...]
> diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c
> index dc8d0191aef4..766df6505a7b 100644
> --- a/drivers/gpu/drm/panthor/panthor_drv.c
> +++ b/drivers/gpu/drm/panthor/panthor_drv.c
> @@ -1872,12 +1872,27 @@ static struct attribute *panthor_attrs[] = {
>  
>  ATTRIBUTE_GROUPS(panthor);
>  
> +static const struct panthor_sysc_config sysc_config_cix_sky1 = {
> +	/* Sky1 needs these SYSC_ALLOC policies for correct display of GPU output. */
> +	.alloc = {
> +		0x00230000, 0x00000023, 0x00000000, 0x00000000,
> +		0x00523222, 0x00523200, 0x00000022, 0x00000032,
> +	},
> +};
> +
> +static const struct panthor_soc_data soc_data_cix_sky1 = {
> +	.needs_external_reset = true,

Not needed.

regards
Philipp

  reply	other threads:[~2026-11-06 12:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-06 10:47 [PATCH 0/3] Add initial GPU " Cunyuan Liu
2026-11-06 10:47 ` [PATCH 1/3] dt-bindings: gpu: Add CIX Sky1 Mali support Cunyuan Liu
2026-11-06 17:17   ` Conor Dooley
2026-11-06 10:47 ` [PATCH 2/3] drm/panthor: Add initial support for CIX Sky1 Cunyuan Liu
2026-11-06 12:04   ` Philipp Zabel [this message]
2026-11-06 13:02     ` Cunyuan Liu (刘存原)
2026-11-06 10:47 ` [PATCH 3/3] arm64: dts: cix: Add GPU support for Sky1 Orion O6 Cunyuan Liu

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