From: Stefan Agner <stefan@agner.ch>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Trent Piepho <tpiepho@impinj.com>,
leonard.crestez@nxp.com, hongxing.zhu@nxp.com,
linux-kernel@vger.kernel.org, jingoohan1@gmail.com,
lorenzo.pieralisi@arm.com, gustavo.pimentel@synopsys.com,
linux-pci@vger.kernel.org, l.stach@pengutronix.de,
Thinh Nguyen <thinh.nguyen@synopsys.com>
Subject: Re: [PATCH v7] PCI: imx6: limit DBI register length
Date: Tue, 26 Feb 2019 10:55:48 +0100 [thread overview]
Message-ID: <ac84df908213ef5c786961e7237e896e@agner.ch> (raw)
In-Reply-To: <CAErSpo5CesyZkJ_2gFJtVh_Dtac3gY1YRLiRn25mazuRsHVovQ@mail.gmail.com>
On 25.02.2019 21:19, Bjorn Helgaas wrote:
> [+cc Thinh]
>
> On Mon, Feb 25, 2019 at 10:52 AM Trent Piepho <tpiepho@impinj.com> wrote:
>> On Mon, 2019-02-25 at 16:15 +0000, Leonard Crestez wrote:
>> > On Mon, 2019-02-25 at 17:02 +0100, Stefan Agner wrote:
>> > > Define the length of the DBI registers and limit config space to its
>> > > length. This makes sure that the kernel does not access registers
>> > > beyond that point, avoiding the following abort on a i.MX 6Quad:
>> > >
>> > > +static void imx6_pcie_quirk(struct pci_dev *dev)
>> > > +{
>> > > + struct pci_bus *bus = dev->bus;
>> > > + struct pcie_port *pp = bus->sysdata;
>> > > +
>> > > + if (bus->number == pp->root_bus_nr) {
>> > > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> > > + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
>> > > +
>> > > + /*
>> > > + * Limit config length to avoid the kernel reading beyond
>> > > + * the register set and causing an abort on i.MX 6Quad
>> > > + */
>> > > + if (imx6_pcie->drvdata->dbi_length)
>> > > + dev->cfg_size = imx6_pcie->drvdata->dbi_length;
>> > > + }
>> > > +}
>> > > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_quirk);
>> >
>> > This looks like a default from SYNOPSYS so it likely run on other SOCs
>> > using the DesignWare PCI IP and crash because of those unchecked casts.
>>
>> Yes, it's used on IMX7d too. But it's worse than that, there's a USB
>> controller core that uses the same vendor and device id,
>> PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3. The quirk for that one uses class ==
>> PCI_CLASS_SERIAL_USB_DEVICE to avoid matching this PCI-e IP. See
>> thread "PCI: Check for USB xHCI class for HAPS platform"
>
> If we could get these vendors to allocate their own Vendor/Device IDs,
> maybe we could consider a DECLARE_PCI_FIXUP_EARLY quirk that would fix
> up pdev->vendor and pdev->device? That might be cleaner than
> cluttering all these quirks with details of this screwup.
According to www.pcilookup.com there is a vendor/product id allocated
for recovery mode (Freescale i.MX 6, 15a2:0054). Is this a real PCI id?
The same Vendor/Device ID is used for USB recovery...
--
Stefan
next prev parent reply other threads:[~2019-02-26 9:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-25 16:02 Stefan Agner
2019-02-25 16:15 ` Leonard Crestez
2019-02-25 16:52 ` Trent Piepho
2019-02-25 20:19 ` Bjorn Helgaas
2019-02-26 9:55 ` Stefan Agner [this message]
2019-02-26 11:36 ` Stefan Agner
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