From: Stefan Agner <stefan@agner.ch>
To: Trent Piepho <tpiepho@impinj.com>
Cc: leonard.crestez@nxp.com, hongxing.zhu@nxp.com,
linux-kernel@vger.kernel.org, jingoohan1@gmail.com,
lorenzo.pieralisi@arm.com, gustavo.pimentel@synopsys.com,
linux-pci@vger.kernel.org, l.stach@pengutronix.de,
bhelgaas@google.com
Subject: Re: [PATCH v7] PCI: imx6: limit DBI register length
Date: Tue, 26 Feb 2019 12:36:57 +0100 [thread overview]
Message-ID: <e38f54385f9ae4383bcb6f368e8d694b@agner.ch> (raw)
In-Reply-To: <1551113572.3075.172.camel@impinj.com>
On 25.02.2019 17:52, Trent Piepho wrote:
> On Mon, 2019-02-25 at 16:15 +0000, Leonard Crestez wrote:
>> On Mon, 2019-02-25 at 17:02 +0100, Stefan Agner wrote:
>> > Define the length of the DBI registers and limit config space to its
>> > length. This makes sure that the kernel does not access registers
>> > beyond that point, avoiding the following abort on a i.MX 6Quad:
>> >
>> > +static void imx6_pcie_quirk(struct pci_dev *dev)
>> > +{
>> > + struct pci_bus *bus = dev->bus;
>> > + struct pcie_port *pp = bus->sysdata;
>> > +
>> > + if (bus->number == pp->root_bus_nr) {
>> > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> > + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
>> > +
>> > + /*
>> > + * Limit config length to avoid the kernel reading beyond
>> > + * the register set and causing an abort on i.MX 6Quad
>> > + */
>> > + if (imx6_pcie->drvdata->dbi_length)
>> > + dev->cfg_size = imx6_pcie->drvdata->dbi_length;
>> > + }
>> > +}
>> > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_quirk);
>>
>> This looks like a default from SYNOPSYS so it likely run on other SOCs
>> using the DesignWare PCI IP and crash because of those unchecked casts.
>
> Yes, it's used on IMX7d too. But it's worse than that, there's a USB
> controller core that uses the same vendor and device id,
> PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3. The quirk for that one uses class ==
> PCI_CLASS_SERIAL_USB_DEVICE to avoid matching this PCI-e IP. See
> thread "PCI: Check for USB xHCI class for HAPS platform"
Hm, I see, something like this should fix this:
DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd,
PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk);
(this needs "PCI: Work around Synopsys duplicate Device ID (HAPS USB3,
NXP i.MX)" applied, which is in v5.0-rc8 already).
--
Stefan
prev parent reply other threads:[~2019-02-26 11:37 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-25 16:02 Stefan Agner
2019-02-25 16:15 ` Leonard Crestez
2019-02-25 16:52 ` Trent Piepho
2019-02-25 20:19 ` Bjorn Helgaas
2019-02-26 9:55 ` Stefan Agner
2019-02-26 11:36 ` Stefan Agner [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e38f54385f9ae4383bcb6f368e8d694b@agner.ch \
--to=stefan@agner.ch \
--cc=bhelgaas@google.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=hongxing.zhu@nxp.com \
--cc=jingoohan1@gmail.com \
--cc=l.stach@pengutronix.de \
--cc=leonard.crestez@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=tpiepho@impinj.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome