From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Li <Frank.Li@nxp.com>,
kishon@ti.com, vkoul@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, balbi@kernel.org,
gregkh@linuxfoundation.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
imx@lists.linux.dev
Subject: Re: [PATCH v1 1/1] usb: phy: mxs: apply board calibration value base on chip trim value
Date: Tue, 30 Aug 2022 20:32:43 +0300 [thread overview]
Message-ID: <af1dd205-149b-034e-5f35-727ac1d151f2@linaro.org> (raw)
In-Reply-To: <20220830162538.2845274-1-Frank.Li@nxp.com>
On 30/08/2022 19:25, Frank Li wrote:
> USBPHY_TRIM_OVERRIDE provide chip trim value. DTS provide board level
> calibration data. Board level calibration data should be base on chip
> trim value.
>
> For example, TXCAL45DP board level hope add +2.85% register base on
> standard 45ohm. But chip trim value is -5.25% to get 45ohm output.
> Actually finial TXCAL45DP should be -5.25% + 2.85% = -2.4%.
>
> If chip have not trim value at USBPHY_TRIM_OVERRIDE, No behavior change.
> board level calibration will be applied.
>
> If chip have trim value at USBPHY_TRIM_OVERRIDE and no DTS board level
> data, chip trim value will be applied.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/usb/phy/phy-mxs-usb.c | 40 ++++++++++++++++++++++++++++++++---
> 1 file changed, 37 insertions(+), 3 deletions(-)
Use scripts/get_maintainers.pl to CC all maintainers and relevant
mailing lists.... and do not Cc unrelated folks.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-08-30 17:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 16:25 Frank Li
2022-08-30 17:32 ` Krzysztof Kozlowski [this message]
2022-08-30 18:27 ` [EXT] " Frank Li
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