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From: "Christian König" <christian.koenig@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: helgaas@kernel.org, amd-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org,
	xen-devel <xen-devel@lists.xen.org>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [Xen-devel] [PATCH v9 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v5
Date: Tue, 28 Nov 2017 11:17:33 +0100	[thread overview]
Message-ID: <af7e8d49-4c3c-f9dc-4ddc-26ce7a1721d0@amd.com> (raw)
In-Reply-To: <5A1D3E9D0200007800192A44@prv-mh.provo.novell.com>

Am 28.11.2017 um 10:46 schrieb Jan Beulich:
>>>> On 28.11.17 at 10:12, <christian.koenig@amd.com> wrote:
>> In theory the BIOS would search for address space and won't find
>> anything, so the hotplug operation should fail even before it reaches
>> the kernel in the first place.
> How would the BIOS know what the OS does or plans to do?

As far as I know the ACPI BIOS should work directly with the register 
content.

So when we update the register content to enable the MMIO decoding the 
BIOS should know that as well.

> I think
> it's the other way around - the OS needs to avoid using any regions
> for MMIO which are marked as hotpluggable in SRAT.

I was under the impression that this is exactly what 
acpi_numa_memory_affinity_init() does.

> Since there is
> no vNUMA yet for Xen Dom0, that would need special handling.

I think that the problem is rather that SRAT is NUMA specific and if I'm 
not totally mistaken the content is ignored when NUMA support isn't 
compiled into the kernel.

When Xen steals some memory from Dom0 by hocking up itself into the e820 
call then I would say the cleanest way is to report this memory in e820 
as reserved as well. But take that with a grain of salt, I'm seriously 
not a Xen expert.

Regards,
Christian.

>
> Jan
>

  reply	other threads:[~2017-11-28 10:17 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-18 13:58 Resizable PCI BAR support V9 Christian König
2017-10-18 13:58 ` [PATCH v9 1/5] PCI: add a define for the PCI resource type mask v2 Christian König
2017-10-18 13:58 ` [PATCH v9 2/5] PCI: add resizeable BAR infrastructure v5 Christian König
2017-10-18 13:58 ` [PATCH v9 3/5] PCI: add functionality for resizing resources v7 Christian König
2017-10-18 13:58 ` [PATCH v9 4/5] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors v5 Christian König
2017-11-02 16:43   ` Alex Deucher
2017-11-20 15:51   ` Boris Ostrovsky
2017-11-20 16:07     ` Christian König
2017-11-20 16:33       ` Boris Ostrovsky
2017-11-21 13:34         ` Christian König
2017-11-21 22:26           ` Boris Ostrovsky
2017-11-22 10:09             ` Christian König
2017-11-22 16:24               ` Boris Ostrovsky
2017-11-22 16:54                 ` Christian König
2017-11-22 17:27                   ` Boris Ostrovsky
2017-11-23  8:11                     ` Christian König
2017-11-23 14:12                       ` Boris Ostrovsky
2017-11-27 18:30                         ` Boris Ostrovsky
2017-11-28  9:12                           ` Christian König
2017-11-28  9:46                             ` [Xen-devel] " Jan Beulich
2017-11-28 10:17                               ` Christian König [this message]
2017-11-28 10:53                                 ` Jan Beulich
2017-11-28 11:59                                   ` Christian König
2017-11-28 18:55                             ` Boris Ostrovsky
2017-10-18 13:58 ` [PATCH v9 5/5] drm/amdgpu: resize VRAM BAR for CPU access v5 Christian König
2017-10-24 19:44 ` Resizable PCI BAR support V9 Bjorn Helgaas
2017-10-25 11:27   ` Christian König

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