mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Nikunj A. Dadhania" <nikunj@amd.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Thomas Lendacky <thomas.lendacky@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	"Borislav Petkov" <bp@alien8.de>,
	Vaishali Thakkar <vaishali.thakkar@suse.com>,
	"Ketan Chaturvedi" <Ketan.Chaturvedi@amd.com>,
	Kai Huang <kai.huang@intel.com>
Subject: Re: [PATCH v11 0/8] KVM: SVM: Enable Secure TSC for SEV-SNP
Date: Wed, 20 Aug 2025 14:18:18 +0530	[thread overview]
Message-ID: <afcf9a0b-7450-4df7-a21b-80b56264fc15@amd.com> (raw)
In-Reply-To: <20250819234833.3080255-1-seanjc@google.com>



On 8/20/2025 5:18 AM, Sean Christopherson wrote:
> This is a combination of Nikunk's series to enable secure TSC support and to
                       
                          *Nikunj's 😊 (close though!)

> fix the GHCB version issues, along with some code refactorings to move SEV+
> setup code into sev.c (we've managed to grow something like 4 flows that all
> do more or less the same thing).
> 
> Note, I haven't tested SNP functionality in any way.

Tested SNP with and without Secure TSC, guest works as expected.

> 
> v11:
>  - Shuffle code around so that snp_is_secure_tsc_enabled() doesn't need to
>    be exposed outside of sev.c.
>  - Explicitly modify the intercept for MSR_AMD64_GUEST_TSC_FREQ (paranoia is
>    cheap in this case).
>  - Trim the changelog for the GHCB version enforcement patch.

>  - Continue on with snp_launch_start() if default_tsc_khz is '0'.  AFAICT,
>    continuing on doesn't put the host at (any moer) risk. [Kai]

If I hack default_tsc_khz  as '0', SNP guest kernel with SecureTSC spits out
couple of warnings and finally panics:
 
 Persistent clock returned invalid value
 ------------[ cut here ]------------
 Missing cycle counter and fallback timer; RNG entropy collection will consequently suffer.
 WARNING: CPU: 0 PID: 0 at drivers/char/random.c:931 random_init+0xe7/0xf0
 RIP: 0010:random_init+0xe7/0xf0
 Call Trace:
  <TASK>
  start_kernel+0x5e9/0xb80
  x86_64_start_reservations+0x18/0x30
  x86_64_start_kernel+0xf5/0x140
  common_startup_64+0x13e/0x141
  </TASK>

...

 WARNING: CPU: 0 PID: 0 at arch/x86/kernel/tsc.c:1464 determine_cpu_tsc_frequencies+0x118/0x120
 CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Tainted: G        W           6.17.0-rc2-stsc+ #1063 PREEMPT(voluntary)
 RIP: 0010:determine_cpu_tsc_frequencies+0x118/0x120
 Call Trace:
  <TASK>
  tsc_init+0x2ba/0x430
  x86_late_time_init+0x29/0x40
  start_kernel+0x70b/0xb80
  x86_64_start_reservations+0x18/0x30
  x86_64_start_kernel+0xf5/0x140
  common_startup_64+0x13e/0x141
  </TASK>

...

 Oops: divide error: 0000 [#1] SMP NOPTI
 CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Tainted: G        W           6.17.0-rc2-stsc+ #1063 PREEMPT(voluntary)
 Tainted: [W]=WARN
 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS unknown 02/02/2022
 RIP: 0010:pit_hpet_ptimer_calibrate_cpu+0x1be/0x410
 Call Trace:
  <TASK>
  determine_cpu_tsc_frequencies+0xc1/0x120
  tsc_init+0x2ba/0x430
  x86_late_time_init+0x29/0x40
  start_kernel+0x70b/0xb80
  x86_64_start_reservations+0x18/0x30
  x86_64_start_kernel+0xf5/0x140
  common_startup_64+0x13e/0x141
  </TASK>

Regards,
Nikunj

  parent reply	other threads:[~2025-08-20  8:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-19 23:48 Sean Christopherson
2025-08-19 23:48 ` [PATCH v11 1/8] KVM: SEV: Drop GHCB_VERSION_DEFAULT and open code it Sean Christopherson
2025-08-19 23:48 ` [PATCH v11 2/8] KVM: SEV: Enforce minimum GHCB version requirement for SEV-SNP guests Sean Christopherson
2025-08-19 23:48 ` [PATCH v11 3/8] x86/cpufeatures: Add SNP Secure TSC Sean Christopherson
2025-08-19 23:48 ` [PATCH v11 4/8] KVM: SVM: Move SEV-ES VMSA allocation to a dedicated sev_vcpu_create() helper Sean Christopherson
2025-08-20  9:00   ` Nikunj A. Dadhania
2025-08-19 23:48 ` [PATCH v11 5/8] KVM: SEV: Move init of SNP guest state into sev_init_vmcb() Sean Christopherson
2025-08-20  9:21   ` Nikunj A. Dadhania
2025-08-19 23:48 ` [PATCH v11 6/8] KVM: SEV: Set RESET GHCB MSR value during sev_es_init_vmcb() Sean Christopherson
2025-08-20  9:32   ` Nikunj A. Dadhania
2025-08-19 23:48 ` [PATCH v11 7/8] KVM: SEV: Fold sev_es_vcpu_reset() into sev_vcpu_create() Sean Christopherson
2025-08-20  9:33   ` Nikunj A. Dadhania
2025-08-19 23:48 ` [PATCH v11 8/8] KVM: SVM: Enable Secure TSC for SNP guests Sean Christopherson
2025-08-20  4:53   ` Nikunj A. Dadhania
2025-08-20 13:01     ` Sean Christopherson
2025-08-20 13:11       ` Nikunj A. Dadhania
2025-08-20  8:48 ` Nikunj A. Dadhania [this message]
2025-08-20 11:25   ` [PATCH v11 0/8] KVM: SVM: Enable Secure TSC for SEV-SNP Huang, Kai
2025-08-20 11:30     ` Nikunj A. Dadhania
2025-08-20 15:10       ` Sean Christopherson
2025-08-21 21:35 ` Sean Christopherson
2025-08-25  5:37   ` Nikunj A. Dadhania

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=afcf9a0b-7450-4df7-a21b-80b56264fc15@amd.com \
    --to=nikunj@amd.com \
    --cc=Ketan.Chaturvedi@amd.com \
    --cc=bp@alien8.de \
    --cc=kai.huang@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=michael.roth@amd.com \
    --cc=pbonzini@redhat.com \
    --cc=seanjc@google.com \
    --cc=thomas.lendacky@amd.com \
    --cc=vaishali.thakkar@suse.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®