* [PATCH v4 1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3
2026-06-02 10:23 [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs Khristine Andreea Barbulescu
@ 2026-06-02 10:23 ` Khristine Andreea Barbulescu
2026-06-02 13:26 ` [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs Frank Li
2026-06-02 16:35 ` Frank.Li
2 siblings, 0 replies; 5+ messages in thread
From: Khristine Andreea Barbulescu @ 2026-06-02 10:23 UTC (permalink / raw)
To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Frank Li,
Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Pengutronix Kernel Team, linux-arm-kernel, imx, devicetree,
linux-kernel, NXP S32 Linux, Christophe Lizzi, Alberto Ruiz,
Enric Balletbo
Add PWM0 and PWM1 for S32G2 and S32G3 SoCs
Reviewed-by: Enric Balletbo i Serra <eballetb@redhat.com>
Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 +++++++
arch/arm64/boot/dts/freescale/s32g3.dtsi | 28 +++++++
.../boot/dts/freescale/s32gxxxa-evb.dtsi | 78 ++++++++++++++++++-
3 files changed, 131 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index a1f33197b4b0..809019ea0e29 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -563,6 +563,19 @@ i2c2: i2c@401ec000 {
status = "disabled";
};
+ pwm0: pwm@401f4000 {
+ compatible = "nxp,s32g2-ftm-pwm";
+ reg = <0x401f4000 0x1000>;
+ #pwm-cells = <3>;
+ clocks = <&clks 5>,
+ <&clks 6>,
+ <&clks 5>,
+ <&clks 5>;
+ clock-names = "ftm_sys", "ftm_ext",
+ "ftm_fix", "ftm_cnt_clk_en";
+ status = "disabled";
+ };
+
adc0: adc@401f8000 {
compatible = "nxp,s32g2-sar-adc";
reg = <0x401f8000 0x1000>;
@@ -745,6 +758,19 @@ i2c4: i2c@402dc000 {
status = "disabled";
};
+ pwm1: pwm@402e4000 {
+ compatible = "nxp,s32g2-ftm-pwm";
+ reg = <0x402e4000 0x1000>;
+ #pwm-cells = <3>;
+ clocks = <&clks 7>,
+ <&clks 8>,
+ <&clks 7>,
+ <&clks 7>;
+ clock-names = "ftm_sys", "ftm_ext",
+ "ftm_fix", "ftm_cnt_clk_en";
+ status = "disabled";
+ };
+
adc1: adc@402e8000 {
compatible = "nxp,s32g2-sar-adc";
reg = <0x402e8000 0x1000>;
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index 6a1e0665d73e..22e80fc03f9c 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -626,6 +626,20 @@ i2c2: i2c@401ec000 {
status = "disabled";
};
+ pwm0: pwm@401f4000 {
+ compatible = "nxp,s32g3-ftm-pwm",
+ "nxp,s32g2-ftm-pwm";
+ reg = <0x401f4000 0x1000>;
+ #pwm-cells = <3>;
+ clocks = <&clks 5>,
+ <&clks 6>,
+ <&clks 5>,
+ <&clks 5>;
+ clock-names = "ftm_sys", "ftm_ext",
+ "ftm_fix", "ftm_cnt_clk_en";
+ status = "disabled";
+ };
+
adc0: adc@401f8000 {
compatible = "nxp,s32g3-sar-adc", "nxp,s32g2-sar-adc";
reg = <0x401f8000 0x1000>;
@@ -820,6 +834,20 @@ i2c4: i2c@402dc000 {
status = "disabled";
};
+ pwm1: pwm@402e4000 {
+ compatible = "nxp,s32g3-ftm-pwm",
+ "nxp,s32g2-ftm-pwm";
+ reg = <0x402e4000 0x1000>;
+ #pwm-cells = <3>;
+ clocks = <&clks 7>,
+ <&clks 8>,
+ <&clks 7>,
+ <&clks 7>;
+ clock-names = "ftm_sys", "ftm_ext",
+ "ftm_fix", "ftm_cnt_clk_en";
+ status = "disabled";
+ };
+
adc1: adc@402e8000 {
compatible = "nxp,s32g3-sar-adc", "nxp,s32g2-sar-adc";
reg = <0x402e8000 0x1000>;
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
index 803ff4531077..be7b645afa2d 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright 2024 NXP
+ * Copyright 2024, 2026 NXP
*
* Authors: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
* Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
@@ -245,6 +245,70 @@ dspi5-grp4 {
bias-pull-up;
};
};
+
+ ftm0_pins: ftm0-pins {
+ ftm0-grp0 {
+ pinmux = <0x2912>;
+ };
+
+ ftm0-grp1 {
+ pinmux = <0x122>,
+ <0xb42>;
+ output-enable;
+ input-enable;
+ };
+
+ ftm0-grp2 {
+ pinmux = <0xb13>,
+ <0xb53>;
+ output-enable;
+ input-enable;
+ };
+
+ ftm0-grp3 {
+ pinmux = <0x2904>;
+ };
+
+ ftm0-grp4 {
+ pinmux = <0x2925>;
+ };
+
+ ftm0-grp5 {
+ pinmux = <0x2936>;
+ };
+ };
+
+ ftm1_pins: ftm1-pins {
+ ftm1-grp0 {
+ pinmux = <0x1d3>;
+ output-enable;
+ input-enable;
+ };
+
+ ftm1-grp1 {
+ pinmux = <0x29b4>;
+ };
+
+ ftm1-grp2 {
+ pinmux = <0x29c3>;
+ };
+
+ ftm1-grp3 {
+ pinmux = <0x1f4>;
+ output-enable;
+ input-enable;
+ };
+
+ ftm1-grp4 {
+ pinmux = <0x202>;
+ output-enable;
+ input-enable;
+ };
+
+ ftm1-grp5 {
+ pinmux = <0x29d2>;
+ };
+ };
};
&can0 {
@@ -293,6 +357,18 @@ &i2c4 {
status = "okay";
};
+&pwm0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ftm0_pins>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ftm1_pins>;
+ status = "okay";
+};
+
&spi1 {
pinctrl-0 = <&dspi1_pins>;
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs
2026-06-02 10:23 [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs Khristine Andreea Barbulescu
2026-06-02 10:23 ` [PATCH v4 1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3 Khristine Andreea Barbulescu
@ 2026-06-02 13:26 ` Frank Li
2026-06-02 16:35 ` Frank.Li
2 siblings, 0 replies; 5+ messages in thread
From: Frank Li @ 2026-06-02 13:26 UTC (permalink / raw)
To: Khristine Andreea Barbulescu
Cc: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Sascha Hauer,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Pengutronix Kernel Team, linux-arm-kernel, imx, devicetree,
linux-kernel, NXP S32 Linux, Christophe Lizzi, Alberto Ruiz,
Enric Balletbo
On Tue, Jun 02, 2026 at 12:23:50PM +0200, Khristine Andreea Barbulescu wrote:
> This patchset aims to add one change to the S32G2/S32G3 dtsi support:
> - Add PWM dts support for S32G SoC based boards
Please bump version at next time. use the same version will cause the
confuse.
Only keep the same version when use RESEND.
Frank
>
> v4 -> v3:
> - fix indentantions again
>
> v3 -> v2:
> - remove vendor internal issue tracker
>
> v2 -> v1:
> - fix indentation alignment
> - use hyphens for pwm pinctrl nodes
> - sort pwm nodes alphabetically
>
> Khristine Andreea Barbulescu (1):
> arm64: dts: s32g: add PWM support for s32g2 and s32g3
>
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 +++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 28 +++++++
> .../boot/dts/freescale/s32gxxxa-evb.dtsi | 78 ++++++++++++++++++-
> 3 files changed, 131 insertions(+), 1 deletion(-)
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs
2026-06-02 10:23 [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs Khristine Andreea Barbulescu
2026-06-02 10:23 ` [PATCH v4 1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3 Khristine Andreea Barbulescu
2026-06-02 13:26 ` [PATCH v4 0/1] add PWM DTS support for S32G2/S32G3 SoCs Frank Li
@ 2026-06-02 16:35 ` Frank.Li
2 siblings, 0 replies; 5+ messages in thread
From: Frank.Li @ 2026-06-02 16:35 UTC (permalink / raw)
To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Sascha Hauer,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Khristine Andreea Barbulescu
Cc: Frank Li, Pengutronix Kernel Team, linux-arm-kernel, imx,
devicetree, linux-kernel, NXP S32 Linux, Christophe Lizzi,
Alberto Ruiz, Enric Balletbo
From: Frank Li <Frank.Li@nxp.com>
On Tue, 02 Jun 2026 12:23:50 +0200, Khristine Andreea Barbulescu wrote:
> This patchset aims to add one change to the S32G2/S32G3 dtsi support:
> - Add PWM dts support for S32G SoC based boards
>
> v4 -> v3:
> - fix indentantions again
>
> v3 -> v2:
> - remove vendor internal issue tracker
>
> [...]
Applied, thanks!
[1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3
commit: de1ad533cc630389c47bdd0b45c3b55aaf428c30
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply [flat|nested] 5+ messages in thread