Re: [PATCH 2/2] arm64: sleep: dedup the sleep_save_stash slot lookup

[Will Deacon <will@kernel.org>]

On Thu, Jul 16, 2026 at 05:55:38PM +0100, Bradley Morgan wrote:
> On July 16, 2026 3:35:48 PM GMT+01:00, Will Deacon <will@kernel.org> wrote:
> >On Sun, Jul 05, 2026 at 07:23:31PM +0000, Bradley Morgan wrote:
> >> Both __cpu_suspend_enter() and _cpu_resume() open code the same MPIDR
> >> hash lookup. Factor it into a get_sleep_stash_slot macro.
> >> 
> >> Signed-off-by: Bradley Morgan <include@grrlz.net>
> >> ---
> >>  arch/arm64/kernel/sleep.S | 55 +++++++++++++++++++++------------------
> >>  1 file changed, 30 insertions(+), 25 deletions(-)
> >> 
> >> diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
> >> index e112b8537f10..8820a131aef7 100644
> >> --- a/arch/arm64/kernel/sleep.S
> >> +++ b/arch/arm64/kernel/sleep.S
> >> @@ -64,6 +64,31 @@
> >>  	lsr	\mask ,\mask, \rs3
> >>  	orr	\dst, \dst, \mask		// dst|=(aff3>>rs3)
> >>  	.endm
> >> +
> >> +/*
> >> + * Compute the address of the current CPU's entry in sleep_save_stash,
> >> + * i.e. &sleep_save_stash[hash(MPIDR_EL1)].
> >> + *
> >> + * @slot: output register
> >> + *
> >> + * Clobbers: x2 - x8
> >> + */
> >> +	.macro get_sleep_stash_slot slot
> >> +	mpidr_hash_assert_distinct \slot, x2
> >> +	mrs	x3, mpidr_el1
> >> +	adr_l	x2, mpidr_hash
> >> +	ldr	x8, [x2, #MPIDR_HASH_MASK]
> >> +	/*
> >> +	 * Following code relies on the struct mpidr_hash
> >> +	 * members size.
> >> +	 */
> >> +	ldp	w4, w5, [x2, #MPIDR_HASH_SHIFTS]
> >> +	ldp	w6, w7, [x2, #(MPIDR_HASH_SHIFTS + 8)]
> >> +	compute_mpidr_hash x2, x4, x5, x6, x7, x3, x8
> >> +	ldr_l	\slot, sleep_save_stash
> >> +	add	\slot, \slot, x2, lsl #3
> >> +	.endm
> >
> >I think this would now be the only user of compute_mpidr_hash, so it's
> >probably better to inline that macro here and then we don't need to
> >bother with mpidr_hash_assert_distinct at all (i.e. your first patch
> >isn't needed).
> >
> >Will
> >
> 
> 
> Will! What do you think of this?

I think it's been mangled by your mail client. Please just send a v2 and
I'll get to it on the next pass through my inbox (which is an unholy mess
right now).

Will