Re: [PATCH v2 4/4] Add R3MWAIT to CPU features

[Thomas Gleixner <tglx@linutronix.de>]

On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote:
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 8cb57df..e4ff3d0 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -29,6 +29,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
>  	u32 max_level;
>  	u32 regs[4];
>  	const struct cpuid_bit *cb;
> +	u64 misc_thd_enable;
>  
>  	static const struct cpuid_bit cpuid_bits[] = {
>  		{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },
> @@ -54,4 +55,8 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
>  		if (regs[cb->reg] & (1 << cb->bit))
>  			set_cpu_cap(c, cb->feature);
>  	}
> +
> +	rdmsrl(MSR_PHI_MISC_THD_FEATURE, misc_thd_enable);

And what makes you sure that you can just use rdmsrl() unconditionally and
assume that the MSR is actually there? This breaks the world and some
more. Either make sure that this is only ran on PHI or simply use
rdmsrl_safe() which is safe everywhere,


> +	if ((misc_thd_enable & MSR_PHI_MISC_THD_FEATURE_R3MWAIT) != 0)

	if (misc_thd_enable & MSR_PHI_MISC_THD_FEATURE_R3MWAIT)
	
is entirely sufficient.

> +		set_cpu_cap(c, X86_FEATURE_PHIR3MWAIT);

Thanks,

	tglx