From: Thomas Gleixner <tglx@linutronix.de>
To: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>,
mingo@redhat.com, hpa@zytor.com, x86@kernel.org, bp@suse.de,
linux-kernel@vger.kernel.org, lukasz.daniluk@intel.com,
james.h.cownie@intel.com
Subject: Re: [PATCH v2 2/4] Add enabling of the R3 MWAIT during boot for KNL
Date: Thu, 13 Oct 2016 17:18:36 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1610131708030.7777@nanos> (raw)
In-Reply-To: <57FE64CA.6080902@linux.intel.com>
On Wed, 12 Oct 2016, Dave Hansen wrote:
> On 10/12/2016 06:34 AM, Thomas Gleixner wrote:
> >> > + if (c->x86 == 6 &&
> >> > + c->x86_model == INTEL_FAM6_XEON_PHI_KNL &&
> >> > + phir3mwait) {
> >> > + u64 prev;
> >> > +
> >> > + rdmsrl(MSR_PHI_MISC_THD_FEATURE, prev);
> >> > + if ((prev & MSR_PHI_MISC_THD_FEATURE_R3MWAIT) == 0)
> >> > + wrmsrl(MSR_PHI_MISC_THD_FEATURE,
> >> > + prev | MSR_PHI_MISC_THD_FEATURE_R3MWAIT);
> > The codingstyle here is just convoluted crap. What's wrong with writing it
> > proper?
> >
> > if (c->x86_model == INTEL_FAM6_XEON_PHI_KNL && phir3mwait) {
> > u64 msr;
> >
> > rdmsrl(MSR_PHI_MISC_THD_FEATURE, msr);
> > msr |= MSR_PHI_MISC_THD_FEATURE_R3MWAIT;
> > wrmsrl(MSR_PHI_MISC_THD_FEATURE, msr);
> >
> > }
> >
> > No horrible to read line breaks, no redundant check for x->x86 == 6 because
> > model cannot be INTEL_FAM6_XEON_PHI_KNL if x->x86 != 6. Also the
> > conditional is pointless as the feature is default disabled. And even if it
> > is enabled the extra msr write is not a problem at all. This is early init
> > code and not some hot path.
>
> Hi Thomas,
>
> We really do need to check for family=6 (c->x86==6).
> INTEL_FAM6_XEON_PHI_KNL is just for the model and doesn't check family.
> It implies that you've already checked for family 6.
Indeed. It came to me after sending the mail and closing the notebook to
head out for more conference fun. I expected someone to notice it :)
> Looking at the name, though, it's pretty clear that the naming can
> easily trip folks up.
>
> I do think we've probably screwed up the way we use our 'struct
> x86_cpu_id' mechanism. Maybe we should be providing the
> vendor/family/model sets from a common place to the drivers, instead of
> making them all repeat it individually.
>
> Like have a big header full of:
>
> DECLARE_CPU(INTEL_XEON_PHI_KNL, INTEL..., 6, MODEL_XYZ...);
>
> Once we have that, everybody can just do:
>
> if(cpu_is(c, INTEL_XEON_PHI_KNL))
> ...
>
> and get all the checking they need.
Right, and we should do the following:
__u8 x86;
__u8 x86_vendor;
__u8 x86_model;
__u8 x86_mask;
u32 x86_fvm;
set x86_fvm to family | vendor << 8 | model << 16; and then do the
comparison on that instead of checking 3 bytes in a row.
Thanks,
tglx
next prev parent reply other threads:[~2016-10-13 16:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-12 12:16 [PATCH v2 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk
2016-10-12 12:16 ` [PATCH v2 1/4] Add R3MWAIT register and bit to msr-info.h Grzegorz Andrejczuk
2016-10-12 12:16 ` [PATCH v2 2/4] Add enabling of the R3 MWAIT during boot for KNL Grzegorz Andrejczuk
2016-10-12 13:34 ` Thomas Gleixner
2016-10-12 16:28 ` Dave Hansen
2016-10-13 15:18 ` Thomas Gleixner [this message]
2016-10-12 13:35 ` Thomas Gleixner
2016-10-12 14:32 ` Dave Hansen
2016-10-12 17:21 ` Dave Hansen
2016-10-12 12:16 ` [PATCH v2 3/4] Add hwcap2 for x86 Grzegorz Andrejczuk
2016-10-12 13:38 ` Thomas Gleixner
2016-10-12 13:48 ` Thomas Gleixner
2016-10-12 12:16 ` [PATCH v2 4/4] Add R3MWAIT to CPU features Grzegorz Andrejczuk
2016-10-12 12:51 ` Borislav Petkov
2016-10-12 13:22 ` Thomas Gleixner
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