From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>,
Ingo Molnar <mingo@elte.hu>, Tony Luck <tony.luck@intel.com>,
Ravi V Shankar <ravi.v.shankar@intel.com>,
Sai Prakhya <sai.praneeth.prakhya@intel.com>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH 3/3] x86/intel_rdt: Update closid in PQR_ASSOC registers in synchronous mode when changing "cpus"
Date: Tue, 15 Nov 2016 17:40:05 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.20.1611151738240.3595@nanos> (raw)
In-Reply-To: <alpine.DEB.2.20.1611151451330.3602@nanos>
On Tue, 15 Nov 2016, Thomas Gleixner wrote:
> On Fri, 11 Nov 2016, Fenghua Yu wrote:
> > +/*
> > + * MSR_IA32_PQR_ASSOC is scoped per logical CPU, so all updates
> > + * are always in thread context.
>
> And this comment tells us what? Nothing useful. It lacks the most important
> information why this is safe against a logical CPU switching the MSR right
> at this moment during context switch. It's safe because the pqr_switch_to
> function is called with interrupts disabled.
>
> > + */
> > +static void rdt_update_pqr_assoc_closid(void *v)
> > +{
> > + struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
> > +
> > + state->closid = *(int *)v;
> > + wrmsr(MSR_IA32_PQR_ASSOC, state->rmid, state->closid);
Furthermore, unconditionally writting the MSR is Just Wrong because the
current executing task might have it's own closid set which gets
overwritten by this.
No cookies!
tglx
next prev parent reply other threads:[~2016-11-15 16:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-12 1:02 [PATCH 1/3] x86/intel_rdt: Fix kernfs_to_rdtgroup to know about "info/*" directories Fenghua Yu
2016-11-12 1:02 ` [PATCH 2/3] x86/intel_rdt: Return state to default on umount Fenghua Yu
2016-11-15 13:35 ` Thomas Gleixner
2016-11-15 17:28 ` Thomas Gleixner
2016-11-15 17:44 ` [tip:x86/cache] x86/intel_rdt: Reset per cpu closids on unmount tip-bot for Fenghua Yu
2016-11-12 1:02 ` [PATCH 3/3] x86/intel_rdt: Update closid in PQR_ASSOC registers in synchronous mode when changing "cpus" Fenghua Yu
2016-11-15 13:43 ` Thomas Gleixner
2016-11-15 14:00 ` Thomas Gleixner
2016-11-15 16:40 ` Thomas Gleixner [this message]
2016-11-15 17:44 ` [tip:x86/cache] x86/intel_rdt: Update percpu closid immeditately on CPUs affected by changee tip-bot for Fenghua Yu
2016-11-15 17:42 ` [tip:x86/cache] x86/intel_rdt: Protect info directory from removal tip-bot for Fenghua Yu
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