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From: Thomas Gleixner <tglx@linutronix.de>
To: Shivappa Vikas <vikas.shivappa@linux.intel.com>
Cc: vikas.shivappa@intel.com, linux-kernel@vger.kernel.org,
	x86@kernel.org, hpa@zytor.com, mingo@kernel.org,
	peterz@infradead.org, ravi.v.shankar@intel.com,
	tony.luck@intel.com, fenghua.yu@intel.com, andi.kleen@intel.com
Subject: Re: [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata
Date: Fri, 10 Mar 2017 11:53:45 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.20.1703101150160.3681@nanos> (raw)
In-Reply-To: <alpine.DEB.2.10.1703091601480.5245@vshiva-Udesk>

On Thu, 9 Mar 2017, Shivappa Vikas wrote:

> 
> > Anyway, first of all we want to know WHY this ordering is required. If it's
> > not required then why would we enforce it?
> 
> Do the users want to see the data in the same order they entered ? If we want
> to do that then its easy to implement when we enforce the order .. (because
> right now resources are always displayed in a predefined order).
> Otherwise i can drop this patch.

It's fine to display them in a defined order, but there is no point to
enforce the ordering on write.

The real question here is whether we really have to write every line on
every update. IMO it's sufficient to write a single resource line and not
require to update all resources every time.

Thanks,

	tglx

  reply	other threads:[~2017-03-10 10:55 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-17 19:38 [PATCH 0/5] x86/intel_rdt: Improvements/Fixes to RDT framework Vikas Shivappa
2017-02-17 19:38 ` [PATCH 1/5] x86/intel_rdt: Update control registers only when user really modifies it Vikas Shivappa
2017-03-01 13:31   ` Thomas Gleixner
2017-03-10  0:00     ` Shivappa Vikas
2017-02-17 19:38 ` [PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata Vikas Shivappa
2017-03-01 14:03   ` Thomas Gleixner
2017-03-10  0:03     ` Shivappa Vikas
2017-03-10 10:53       ` Thomas Gleixner [this message]
2017-03-10 18:25         ` Shivappa Vikas
2017-03-10 18:58           ` Thomas Gleixner
2017-03-10 22:05             ` Luck, Tony
2017-03-11  7:47               ` Thomas Gleixner
2017-03-24 17:51                 ` [PATCH] x86/intel_rdt: Implement "update" mode when writing schemata file Luck, Tony
2017-03-24 23:18                   ` Fenghua Yu
2017-03-30 18:33                     ` Shivappa Vikas
2017-03-31  8:24                   ` Thomas Gleixner
2017-03-31 17:40                     ` Shivappa Vikas
2017-03-31 17:49                       ` Thomas Gleixner
2017-03-31 18:45                   ` Shivappa Vikas
2017-02-17 19:38 ` [PATCH 3/5] x86/intel_rdt: Fail early on a resource with incorrect domains Vikas Shivappa
2017-03-01 14:05   ` Thomas Gleixner
2017-02-17 19:38 ` [PATCH 4/5] x86/intel_rdt: Reset the cbm MSR during rmdir Vikas Shivappa
2017-03-01 14:11   ` Thomas Gleixner
2017-03-10  1:45     ` Shivappa Vikas
2017-02-17 19:38 ` [PATCH 5/5] x86/intel_rdt: hotcpu updates for RDT Vikas Shivappa
2017-03-01 14:24   ` Thomas Gleixner
2017-03-30 19:03     ` Shivappa Vikas

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