From: Thomas Gleixner <tglx@linutronix.de>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
linux-edac@vger.kernel.org, "Andy Lutomirski" <luto@kernel.org>,
"Ingo Molnar" <mingo@redhat.com>,
"H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, "Tony Luck" <tony.luck@intel.com>,
"Borislav Petkov" <bp@alien8.de>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Subject: Re: [PATCH v2 2/2] x86: disable IRQs before changing CR4
Date: Sat, 25 Nov 2017 18:25:33 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.20.1711251823230.2316@nanos> (raw)
In-Reply-To: <803D7D69-1F01-4CB8-A966-A040F302D1C0@gmail.com>
On Sat, 25 Nov 2017, Nadav Amit wrote:
> Thomas Gleixner <tglx@linutronix.de> wrote:
>
> > On Fri, 24 Nov 2017, Nadav Amit wrote:
> >> /* Set in this cpu's CR4. */
> >> -static inline void cr4_set_bits(unsigned long mask)
> >> +static inline void cr4_set_bits_irqs_off(unsigned long mask)
> >
> > This change is kinda weird. I'd expect that there is a corresponding
> > function cr4_set_bits() which takes care of disabling interrupts. But there
> > is not. All it does is creating a lot of pointless churn.
> >
> >> static __always_inline void setup_smep(struct cpuinfo_x86 *c)
> >> static __init int setup_disable_smap(char *arg)
> >> static __always_inline void setup_pku(struct cpuinfo_x86 *c)
> >
> > Why are you not doing this at the call site around all calls which fiddle
> > with cr4, i.e. in identify_cpu() ?
> >
> > identify_cpu() is called from two places:
> >
> > identify_boot_cpu() and identify_secondary_cpu()
> >
> > identify_secondary_cpu is called with interrupts disabled anyway and there
> > is no reason why we can't enforce interrupts being disabled around
> > identify_cpu() completely.
> >
> > But if we actually do the right thing, i.e. having cr4_set_bit() and
> > cr4_set_bit_irqsoff() all of this churn goes away magically.
> >
> > Then the only place which needs to be changed is the context switch because
> > here interrupts are already disabled and we really care about performance.
> >
> >> @@ -293,7 +303,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
> >> }
> >>
> >> if ((tifp ^ tifn) & _TIF_NOTSC)
> >> - cr4_toggle_bits(X86_CR4_TSD);
> >> + cr4_toggle_bits_irqs_off(X86_CR4_TSD);
>
> You make a good point. I will add cr4_set_bit(). I will leave identify_cpu()
> as is, since it is rather hard to maintain code that enables/disables irqs
> at one point and rely on these operations at a completely different place.
> As you said, it is less of an issue once cr4_set_bit() and friends are
> introduced.
I fixed that up already as I wanted to have it done, see the tip-bot mail
in your inbox.
Thanks,
tglx
next prev parent reply other threads:[~2017-11-25 17:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-25 3:29 [PATCH v2 0/2] x86: disable IRQs during CR4 changes Nadav Amit
2017-11-25 3:29 ` [PATCH v2 1/2] x86: refactor CR4 setting and shadow write Nadav Amit
2017-11-25 12:37 ` [tip:x86/urgent] x86/tlb: Refactor " tip-bot for Nadav Amit
2017-11-25 3:29 ` [PATCH v2 2/2] x86: disable IRQs before changing CR4 Nadav Amit
2017-11-25 10:36 ` Thomas Gleixner
2017-11-25 17:20 ` Nadav Amit
2017-11-25 17:25 ` Thomas Gleixner [this message]
2017-11-25 17:31 ` Nadav Amit
2017-11-25 12:38 ` [tip:x86/urgent] x86/tlb: Disable interrupts when " tip-bot for Nadav Amit
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