From: matthew.gerlach@linux.intel.com
To: Xu Yilun <yilun.xu@intel.com>
Cc: hao.wu@intel.com, russell.h.weight@intel.com,
basheer.ahmed.muddebihal@intel.com, trix@redhat.com,
mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
tianfei.zhang@intel.com, corbet@lwn.net,
gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
jirislaby@kernel.org, geert+renesas@glider.be,
andriy.shevchenko@linux.intel.com,
niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk,
johan@kernel.org, lukas@wunner.de, ilpo.jarvinen@linux.intel.com,
marpagan@redhat.com, bagasdotme@gmail.com
Subject: Re: [PATCH v9 3/4] fpga: dfl: add basic support for DFHv1
Date: Mon, 9 Jan 2023 10:04:32 -0800 (PST) [thread overview]
Message-ID: <alpine.DEB.2.22.394.2301091003330.801533@rhweight-WRK1> (raw)
In-Reply-To: <Y7u31S8aba1L+VeA@yilunxu-OptiPlex-7050>
[-- Attachment #1: Type: text/plain, Size: 2263 bytes --]
On Mon, 9 Jan 2023, Xu Yilun wrote:
> On 2023-01-04 at 15:22:52 -0800, matthew.gerlach@linux.intel.com wrote:
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Version 1 of the Device Feature Header (DFH) definition adds
>> functionality to the Device Feature List (DFL) bus.
>>
>> A DFHv1 header may have one or more parameter blocks that
>> further describes the HW to SW. Add support to the DFL bus
>> to parse the MSI-X parameter.
>>
>> The location of a feature's register set is explicitly
>> described in DFHv1 and can be relative to the base of the DFHv1
>> or an absolute address. Parse the location and pass the information
>> to DFL driver.
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>>
>
> [...]
>
>> +static u64 *find_param(u64 *params, resource_size_t max, int param_id)
>> +{
>> + u64 *end = params + max / sizeof(u64);
>> + u64 v, next;
>> +
>> + while (params < end) {
>> + v = *params;
>> + if (param_id == FIELD_GET(DFHv1_PARAM_HDR_ID, v))
>> + return params;
>> +
>> + if (FIELD_GET(DFHv1_PARAM_HDR_NEXT_EOP, v))
>> + break;
>> +
>> + next = FIELD_GET(DFHv1_PARAM_HDR_NEXT_OFFSET, v);
>> + params += next;
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +/**
>> + * dfh_find_param() - find parameter block for the given parameter id
>> + * @dfl_dev: dfl device
>> + * @param_id: id of dfl parameter
>> + * @pcount: destination to store size of parameter data in u64 bit words
>
> As I mentioned before, could the size of the parameter data just be number
> of bytes? This is the most common way for a data block.
returning a void* and a size_t in bytes would be more consistent. I will
make your suggested change.
Thanks,
Matthew Gerlach
>
> Thanks,
> Yilun
>
>> + *
>> + * Return: pointer to start of parameter data, PTR_ERR otherwise.
>> + */
>> +void *dfh_find_param(struct dfl_device *dfl_dev, int param_id, size_t *pcount)
>> +{
>> + u64 *phdr = find_param(dfl_dev->params, dfl_dev->param_size, param_id);
>> +
>> + if (!phdr)
>> + return ERR_PTR(-ENOENT);
>> +
>> + if (pcount)
>> + *pcount = FIELD_GET(DFHv1_PARAM_HDR_NEXT_OFFSET, *phdr) - 1;
>> +
>> + return phdr + 1;
>> +}
>> +EXPORT_SYMBOL_GPL(dfh_find_param);
>
next prev parent reply other threads:[~2023-01-09 18:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-04 23:22 [PATCH v9 0/4] Enhance definition of DFH and use enhancements for UART driver matthew.gerlach
2023-01-04 23:22 ` [PATCH v9 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2023-01-09 13:48 ` Tom Rix
2023-01-09 16:40 ` matthew.gerlach
2023-01-04 23:22 ` [PATCH v9 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2023-01-04 23:22 ` [PATCH v9 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2023-01-09 6:44 ` Xu Yilun
2023-01-09 18:04 ` matthew.gerlach [this message]
2023-01-04 23:22 ` [PATCH v9 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
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